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Modeling Data Movement in the Memory Hierarchy in HPC Systems

Published: 05 October 2015 Publication History

Abstract

Increasing core counts and cache sizes in modern processors are causing data movement across the memory hierarchy to increase. With High Performance Computing (HPC) systems becoming more and more energy constrained, improving energy efficiency is becoming a necessity. Given its significant impact on system energy efficiency, the data movement costs in terms of energy and performance cannot be neglected. Conventional techniques for modeling and analyzing data movement across the memory hierarchy have proven to be inadequate in helping computer architects and system designers to optimize data movement. Our work is a position statement emphasizing the need for more detailed data movement modeling tools that better quantify how data movement across the memory hierarchy during application execution affects energy and performance. The hope is that exposing more detailed characteristics about the data movement would enable designers to optimize applications and architectures for minimizing data movement and in turn reduce energy and perhaps even increase performance.

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Peter. M. Kogge. Reading the Entrails: How Architecture Has Evolved at the High End - IPDPS 2014 Keynote lecture. http://www.ipdps.org/ipdps2014/IPDPS2014keynote-Kogge.pdf, 2014.
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Cited By

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  • (2022)GAPSProceedings of the 36th ACM International Conference on Supercomputing10.1145/3524059.3532373(1-13)Online publication date: 28-Jun-2022
  • (2016)A New Metric to Measure Cache Utilization for HPC WorkloadsProceedings of the Second International Symposium on Memory Systems10.1145/2989081.2989125(10-17)Online publication date: 3-Oct-2016

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cover image ACM Other conferences
MEMSYS '15: Proceedings of the 2015 International Symposium on Memory Systems
October 2015
278 pages
ISBN:9781450336048
DOI:10.1145/2818950
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 October 2015

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Author Tags

  1. data movement
  2. energy
  3. memory hierarchy
  4. modeling

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  • Extended-abstract
  • Research
  • Refereed limited

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MEMSYS '15
MEMSYS '15: International Symposium on Memory Systems
October 5 - 8, 2015
DC, Washington DC, USA

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Cited By

View all
  • (2022)GAPSProceedings of the 36th ACM International Conference on Supercomputing10.1145/3524059.3532373(1-13)Online publication date: 28-Jun-2022
  • (2016)A New Metric to Measure Cache Utilization for HPC WorkloadsProceedings of the Second International Symposium on Memory Systems10.1145/2989081.2989125(10-17)Online publication date: 3-Oct-2016

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