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Past and future of hardware and architecture

Published: 04 October 2015 Publication History

Abstract

We start by looking back at 50 years of computer architecture, where philosophical debates on instruction sets (RISC vs. CISC, VLIW vs. RISC) and parallel architectures (NUMA vs clusters) were settled with billion dollar investments on both sides. In the second half, we look forward. First, Moore's Law is ending, so the free ride is over software-oblivious increasing performance. Since we've already played the multicore card, the most-likely/only path left is domain-specific processors. The memory system is radically changing too. First, Jim Gray's decade-old prediction is finally true: "Tape is dead; flash is disk; disk is tape." New ways to connect to DRAM and new non-volatile memory technologies promise to make the memory hierarchy even deeper. Finally, and surprisingly, there is now widespread agreement on instruction set architecture, namely Reduced Instruction Set Computers. However, unlike most other fields, despite this harmony has been no open alternative to proprietary offerings from ARM and Intel. RISC-V ("RISC Five") is the proposed free and open champion. It has a small base of classic RISC instructions that run a full open-source software stack; opcodes reserved for tailoring an System-On-a-Chip (SOC) to applications; standard instruction extensions optionally included in an SoC; and it is unrestricted: there is no cost, no paperwork, and anyone can use it. The ability to prototype using ever-more-powerful FPGAs and astonishingly inexpensive custom chips combined with collaboration on open-source software and hardware offers hope of a new golden era for hardware/software systems.

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  • (2023)Hardware-based Dual Booting Switch with Customizable Setup Script and Cross Platform Support2023 2nd International Conference on Applied Artificial Intelligence and Computing (ICAAIC)10.1109/ICAAIC56838.2023.10141425(1492-1496)Online publication date: 4-May-2023
  • (2023)Sustainable Computing Through Open Standard ISAs: Leveraging Tailor-Fit Hardware Designs for Circular EconomiesProduction at the Leading Edge of Technology10.1007/978-3-031-47394-4_46(469-480)Online publication date: 18-Nov-2023

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cover image ACM Conferences
SOSP '15: SOSP History Day 2015
October 2015
391 pages
ISBN:9781450340175
DOI:10.1145/2830903
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 04 October 2015

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Overall Acceptance Rate 174 of 961 submissions, 18%

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  • (2023)Hardware-based Dual Booting Switch with Customizable Setup Script and Cross Platform Support2023 2nd International Conference on Applied Artificial Intelligence and Computing (ICAAIC)10.1109/ICAAIC56838.2023.10141425(1492-1496)Online publication date: 4-May-2023
  • (2023)Sustainable Computing Through Open Standard ISAs: Leveraging Tailor-Fit Hardware Designs for Circular EconomiesProduction at the Leading Edge of Technology10.1007/978-3-031-47394-4_46(469-480)Online publication date: 18-Nov-2023

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