Cited By
View all- Lin ZWei MChen YZou PChen JChang Y(2024)Electrostatics-Based Analytical Global Placement for Timing Optimization2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546800(1-6)Online publication date: 25-Mar-2024
- Krishna Kashyap SOzev S(2023)IMPRoVED: Integrated Method to Predict PostRouting setup Violations in Early Design StagesACM Transactions on Design Automation of Electronic Systems10.1145/357254628:4(1-23)Online publication date: 17-May-2023
- Kumar VRout M(2023)Methodology for Timing Closure in VLSI Physical Design containing high clock to Q Memory Delay2023 IEEE Silchar Subsection Conference (SILCON)10.1109/SILCON59133.2023.10404446(1-6)Online publication date: 3-Nov-2023
- Show More Cited By