research-article

Eh?Placer: A High-Performance Modern Technology-Driven Placer

Authors:

Nima Karimpour Darav,

Andrew Kennings,

Aysa Fakheri Tabrizi,

David Westwick,

Laleh BehjatAuthors Info & Claims

ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 21, Issue 3

Article No.: 37, Pages 1 - 27

https://doi.org/10.1145/2899381

Published: 19 April 2016 Publication History

Abstract

The placement problem has become more complex and challenging due to a wide variety of complicated constraints imposed by modern process technologies. Some of the most challenging constraints and objectives were highlighted during the most recent ACM/IEEE International Symposium on Physical Design (ISPD) contests. In this article, the framework of Eh?Placer and its developed algorithms are elaborated, with the main focus on modern technology constraints and runtime. The technology constraints considered as part of Eh?Placer are fence region, target density, and detailed routability constraints. We present a complete description on how these constraints are considered in different stages of Eh?Placer. The results obtained from the contests indicate that Eh?Placer is able to efficiently handle modern technology constraints and ranks highly among top academic placement tools.

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Cited By

Zhang BZhen LWang SYang F(2024)Integrating Operations Research into Very Large-Scale Integrated Circuits Placement Design: A ReviewAsia-Pacific Journal of Operational Research10.1142/S021759592450007641:06Online publication date: 6-Jul-2024
https://doi.org/10.1142/S0217595924500076
Liu LFu BLin SLiu JYoung EWong M(2024)Xplace: An Extremely Fast and Extensible Placement FrameworkIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.334629143:6(1872-1885)Online publication date: Jun-2024
https://doi.org/10.1109/TCAD.2023.3346291
Fontana TAghaeekiasaraee ENetto RAlmeida SGandhi UBehjat LGüntzel J(2024)ILPGRC: ILP-Based Global Routing Optimization With Cell MovementsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.330557943:1(352-365)Online publication date: 1-Jan-2024
https://dl.acm.org/doi/10.1109/TCAD.2023.3305579
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Index Terms

Eh?Placer: A High-Performance Modern Technology-Driven Placer
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement

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Published In

cover image ACM Transactions on Design Automation of Electronic Systems

ACM Transactions on Design Automation of Electronic Systems Volume 21, Issue 3

Special Section on New Physical Design Techniques for the Next Generation Integration Technology and Regular Papers

July 2016

434 pages

ISSN:1084-4309

EISSN:1557-7309

DOI:10.1145/2926747

Editor:
Naehyuck Chang
Korea Advanced Institute of Science and Technology, Korea

Issue’s Table of Contents

Copyright © 2016 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 19 April 2016

Accepted: 01 January 2016

Revised: 01 December 2015

Received: 01 July 2015

Published in TODAES Volume 21, Issue 3

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Alberta Innovates-Technology Futures (AITF)
Natural Sciences and Engineering Council of Canada (NSERC)
Compute/Calcul Canada and the Canadian Microelectronics Corporation (CMC)

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Cited By

Zhang BZhen LWang SYang F(2024)Integrating Operations Research into Very Large-Scale Integrated Circuits Placement Design: A ReviewAsia-Pacific Journal of Operational Research10.1142/S021759592450007641:06Online publication date: 6-Jul-2024
https://doi.org/10.1142/S0217595924500076
Liu LFu BLin SLiu JYoung EWong M(2024)Xplace: An Extremely Fast and Extensible Placement FrameworkIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.334629143:6(1872-1885)Online publication date: Jun-2024
https://doi.org/10.1109/TCAD.2023.3346291
Fontana TAghaeekiasaraee ENetto RAlmeida SGandhi UBehjat LGüntzel J(2024)ILPGRC: ILP-Based Global Routing Optimization With Cell MovementsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.330557943:1(352-365)Online publication date: 1-Jan-2024
https://dl.acm.org/doi/10.1109/TCAD.2023.3305579
Aghaeekiasaraee ETabrizi AFontana TNetto RAlmeida SGandhi UGüntzel JWestwick DBehjat L(2023)CRP2.0: A Fast and Robust Cooperation between Routing and Placement in Advanced Technology NodesACM Transactions on Design Automation of Electronic Systems10.1145/359096228:5(1-42)Online publication date: 9-Sep-2023
https://dl.acm.org/doi/10.1145/3590962
Zhou CQiu JCao YYang GShen QShi Q(2023)An accelerated modulus-based matrix splitting iteration method for mixed-size cell circuits legalizationIntegration, the VLSI Journal10.1016/j.vlsi.2022.08.01088:C(20-31)Online publication date: 1-Jan-2023
https://dl.acm.org/doi/10.1016/j.vlsi.2022.08.010
Aghaeekiasaraee ETabrizi AFontana TNetto RAlmeida SGandhi UGüntzel JWestwick DBehjat LBolchini CO'Connor IVerbauwhede IWille R(2022)CR&PProceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3540030(772-777)Online publication date: 14-Mar-2022
https://dl.acm.org/doi/10.5555/3539845.3540030
Aghaeekiasaraee ETabrizi AFontana TNetto RAlmeida SGandhi UGutzel JWestwick DBehjat L(2022)CR&P: An Efficient Co-operation between Routing and Placement2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE54114.2022.9774530(772-777)Online publication date: 14-Mar-2022
https://doi.org/10.23919/DATE54114.2022.9774530
Yu TDarav NBustany IDehkordi MBadaroglu MDutt S(2022)A Machine Learning Approach for Accelerating SimPL-Based Global Placement for FPGA'sProceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding10.1145/3557988.3569714(1-7)Online publication date: 3-Nov-2022
https://dl.acm.org/doi/10.1145/3557988.3569714
Liu LFu BWong MYoung EOshana R(2022)XplaceProceedings of the 59th ACM/IEEE Design Automation Conference10.1145/3489517.3530485(1309-1314)Online publication date: 10-Jul-2022
https://dl.acm.org/doi/10.1145/3489517.3530485
Zhou CCao YShi QQiu J(2022)A Robust Two-Step Modulus-Based Matrix Splitting Iteration Method for Mixed-Size Cell Circuit Legalization ProblemJournal of Circuits, Systems and Computers10.1142/S021812662350129332:08Online publication date: 19-Nov-2022
https://doi.org/10.1142/S0218126623501293
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