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Area-Efficient Error-Resilient Discrete Fourier Transformation Design using Stochastic Computing

Published: 18 May 2016 Publication History

Abstract

Discrete Fourier Transformation (DFT)/Fast Fourier Transformation (FFT) are the widely used techniques in numerous modern signal processing applications. In general, because of their inherent multiplication-intensive characteristics, the hardware implementations of DFT/FFT usually require a large amount of hardware resource, which limits their applications in area-constraint scenarios. To overcome this challenge, this paper, for the first time, proposes area-efficient error-resilient DFT designs using stochastic computing. By leveraging low-complexity stochastic multipliers, two types of stochastic DFT design are presented with significant reduction in overall area. Analysis results show that compared with the conventional design, the proposed two 256-point stochastic DFT designs achieve 76% and 62% reduction in area, respectively. More importantly, these stochastic DFT designs also show much stronger error-resilience, which is very attractive in nanoscale CMOS era.

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  1. Area-Efficient Error-Resilient Discrete Fourier Transformation Design using Stochastic Computing

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      cover image ACM Conferences
      GLSVLSI '16: Proceedings of the 26th edition on Great Lakes Symposium on VLSI
      May 2016
      462 pages
      ISBN:9781450342742
      DOI:10.1145/2902961
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      Published: 18 May 2016

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      Author Tags

      1. DFT
      2. FFT
      3. VLSI
      4. error resilience
      5. stochastic computing

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      Cited By

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      • (2021)Hartley Stochastic Computing For Convolutional Neural Networks2021 IEEE Workshop on Signal Processing Systems (SiPS)10.1109/SiPS52927.2021.00049(1-6)Online publication date: Oct-2021
      • (2021)Implementing Convolutional Neural Networks Using Hartley Stochastic Computing With Adaptive Rate Feature Map CompressionIEEE Open Journal of Circuits and Systems10.1109/OJCAS.2021.31238992(805-819)Online publication date: 2021
      • (2020)Novel Noise-Shaping Stochastic-Computing Converters for Digital Filtering2020 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS45731.2020.9180770(1-5)Online publication date: Oct-2020
      • (2019)ASC-FFT: Area-Efficient Low-Latency FFT Design Based on Asynchronous Stochastic Computing2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)10.1109/LASCAS.2019.8667599(117-120)Online publication date: Feb-2019
      • (2019)Memory System Designed for Multiply-Accumulate (MAC) Engine Based on Stochastic Computing2019 International Conference on IC Design and Technology (ICICDT)10.1109/ICICDT.2019.8790878(1-4)Online publication date: Jun-2019
      • (2019)An Energy-Efficient Mixed-Signal Parallel Multiply-Accumulate (MAC) Engine Based on Stochastic Computing2019 IEEE 13th International Conference on ASIC (ASICON)10.1109/ASICON47005.2019.8983571(1-4)Online publication date: Oct-2019
      • (2016)Area-Efficient Scaling-Free DFT/FFT Design Using Stochastic ComputingIEEE Transactions on Circuits and Systems II: Express Briefs10.1109/TCSII.2016.260346563:12(1131-1135)Online publication date: Dec-2016
      • (2016)High-Accuracy FIR Filter Design Using Stochastic Computing2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2016.63(128-133)Online publication date: Jul-2016
      • (2016)Designing reconfigurable large-scale deep learning systems using stochastic computing2016 IEEE International Conference on Rebooting Computing (ICRC)10.1109/ICRC.2016.7738685(1-7)Online publication date: Oct-2016

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