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Capturing True Workload Dependency of BTI-induced Degradation in CPU Components

Published: 18 May 2016 Publication History

Abstract

Atomistic-based approaches accurately model Bias Temperature Instability phenomena, but they suffer from prolonged execution times, preventing their seamless integration in system-level analysis flows. In this paper we present a comprehensive flow that combines the accuracy of Capture Emission Time (CET) maps with the efficiency of the Compact Digital Waveform (CDW) representation. That way, we capture the true workload-dependent BTI-induced degradation of selected CPU components. First, we show that existing works that assume constant stress patterns fail to account for workload dependency leading to fundamental estimation errors. Second, we evaluate the impact of different real workloads on selected CPU sub-blocks from a commercial processor design. To the best of our knowledge, this is the first work that combines atomistic property and true workload-dependency for variability analysis.

References

[1]
B. Kaczer et al. Origin of NBTI variability in deeply scaled pFETs. In IEEE IRPS, pages 26--32, May 2010.
[2]
B. Kaczer et al. Atomistic approach to variability of bias-temperature instability in circuit simulations. In IEEE IRPS, pages XT.3.1--XT.3.5, April 2011.
[3]
D. Rodopoulos et al. Time and workload dependent device variability in circuit simulations. In IEEE ICICDT, pages 1--4, May 2011.
[4]
D. Rodopoulos et al. Atomistic pseudo-transient BTI simulation with inherent workload memory. IEEE TDMR, 14(2):704--714, June 2014.
[5]
D. Rodopoulos et al. Understanding timing impact of BTI/RTN with massively threaded atomistic transient simulations. In IEEE ICICDT, pages 1--4, May 2014.
[6]
D. Stamoulis et al. Efficient reliability analysis of processor datapath using atomistic bti variability models. In 25th ACM GLSVLSI, May 2015.
[7]
J. Fang and S. Sapatnekar. Understanding the impact of transistor-level BTI variability. In IEEE IRPS, pages CR.2.1--CR.2.6, Apr. 2012.
[8]
H. Kukner et al. Comparison of reaction-diffusion and atomistic trap-based BTI models for logic gates. IEEE TDMR, 14(1):182--193, Mar. 2014.
[9]
H. Kukner et al. Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology. In 15th ISQED, pages 473--479, Mar. 2014.
[10]
H. Reisinger et al. The statistical analysis of individual defects constituting nbti and its implications for modeling dc- and ac-stress. In IEEE IRPS, pages 7--15, May 2010.
[11]
J. Gustafsson et al. The mälardalen WCET benchmarks: Past, present and future. In WCET 2010, 2010, Brussels, Belgium, pages 136--146, 2010.
[12]
H. Kufluoglu and M. Alam. A generalized reaction--diffusion model with explicit h--h2 dynamics for negative-bias temperature-instability (nbti) degradation. IEEE TED, 54(5):1101--1107, May 2007.
[13]
OpenSPARC, Oracle. http://www.oracle.com.
[14]
P. Weckx P. et al. Defect-based methodology for workload-dependent circuit lifetime projections - Application to SRAM. In IEEE IRPS, pages 3A.4.1--3A.4.7, Apr. 2013.
[15]
P. Weckx et al. Non-monte-carlo methodology for high-sigma simulations of circuits under workload-dependent BTI degradation -- application to 6t SRAM. In IEEE IRPS, pages 5D.2.1--5D.2.6, 2014.
[16]
Y. Reis, Ricardo; Cao and G. Wirth, editors. Circuit Design for Reliability. Springer, 2015.
[17]
T. Grasser et al. Analytic modeling of the bias temperature instability using capture/emission time maps. In IEEE IEDM, pages 27.4.1--27.4.4, Dec 2011.
[18]
T. Grasser et al. The paradigm shift in understanding the bias temperature instability: From reaction--diffusion to switching oxide traps. IEEE TED, 58(11):3652--3666, Nov. 2011.

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  • (2020)Analysis of Functional Errors Produced by Long-Term Workload-Dependent BTI Degradation in Ultralow Power ProcessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.300347128:10(2122-2133)Online publication date: Oct-2020
  • (2020)Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI SystemsICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)10.1109/ICASSP40776.2020.9054524(1549-1552)Online publication date: May-2020
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  1. Capturing True Workload Dependency of BTI-induced Degradation in CPU Components

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      cover image ACM Conferences
      GLSVLSI '16: Proceedings of the 26th edition on Great Lakes Symposium on VLSI
      May 2016
      462 pages
      ISBN:9781450342742
      DOI:10.1145/2902961
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Publication History

      Published: 18 May 2016

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      Author Tags

      1. bias temperature instability (BTI)
      2. variability analysis
      3. workload dependency

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      • European Commission

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      GLSVLSI '16: Great Lakes Symposium on VLSI 2016
      May 18 - 20, 2016
      Massachusetts, Boston, USA

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      Overall Acceptance Rate 312 of 1,156 submissions, 27%

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      View all
      • (2021)Overhead Reduction with Optimal Margining Using A Reliability Aware Design Paradigm2021 IEEE International Reliability Physics Symposium (IRPS)10.1109/IRPS46558.2021.9405198(1-7)Online publication date: 21-Mar-2021
      • (2020)Analysis of Functional Errors Produced by Long-Term Workload-Dependent BTI Degradation in Ultralow Power ProcessorsIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.300347128:10(2122-2133)Online publication date: Oct-2020
      • (2020)Exploration Methodology for BTI-Induced Failures on RRAM-Based Edge AI SystemsICASSP 2020 - 2020 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP)10.1109/ICASSP40776.2020.9054524(1549-1552)Online publication date: May-2020
      • (2019)Estimation of oxide breakdown effects by fault injection2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS)10.1109/IOLTS.2019.8854441(269-274)Online publication date: Jul-2019
      • (2018)Improving Robustness of a Real-Time Spectrum Sensing Application with the HARPA Run-Time EngineHarnessing Performance Variability in Embedded and High-performance Many/Multi-core Platforms10.1007/978-3-319-91962-1_7(151-164)Online publication date: 24-Oct-2018
      • (2017)HARPAProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130402(97-102)Online publication date: 27-Mar-2017
      • (2017)HARPA: Tackling physically induced performance variabilityDesign, Automation & Test in Europe Conference & Exhibition (DATE), 201710.23919/DATE.2017.7926965(97-102)Online publication date: Mar-2017
      • (2016)Exploring aging deceleration in FinFET-based multi-core systems2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)10.1145/2966986.2967039(1-8)Online publication date: 7-Nov-2016
      • (2016)Can We Guarantee Performance Requirements under Workload and Process Variations?Proceedings of the 2016 International Symposium on Low Power Electronics and Design10.1145/2934583.2934641(308-313)Online publication date: 8-Aug-2016

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