skip to main content
research-article

Periodic Scan-In States to Reduce the Input Test Data Volume for Partially Functional Broadside Tests

Published:27 May 2016Publication History
Skip Abstract Section

Abstract

This article describes a procedure for test data compression targeting functional and partially functional broadside tests. The scan-in state of such a test is either a reachable state or has a known Hamming distance from a reachable state. Reachable states are fully specified, while the popular LFSR-based test data compression methods require the use of incompletely specified test cubes. The test data compression approach considered in this article is based on the use of periodic scan-in states. Such states require the storage of a period that can be significantly shorter than a scan-in state, thus providing test data compression. The procedure computes a set of periods that is sufficient for detecting all the detectable target faults. Considering the scan-in states that the periods produce, the procedure ranks the periods based on the distances of the scan-in states from reachable states, and the lengths of the periods. Functional and partially functional broadside tests are generated preferring shorter periods with smaller Hamming distances. The results are compared with those of an LFSR-based approach.

References

  1. C. Barnhart, V. Brunkhorst, F. Distler, O. Farnsworth, B. Keller, and B. Koenemann. 2001. OPMISR: The foundation for compressed ATPG vectors. In Proceedings of the International Test Conference. IEEE, 748--757. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. A. Chandra, J. Saikia, and R. Kapur. 2011. Breaking the test application time barriers in compression: Adaptive scan-cyclical (AS-C). In Proceedings of the Asian Test Symposium. IEEE, 432--437. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. H. Hashempour and F. Lombardi. 2005. Application of arithmetic coding to compression of VLSI test data. IEEE Transactions on Computers. 54, 9 (September 2005), 1166--1177. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. A. Jas, J. Ghosh-Dastidar, M.-E. Ng, and N. A. Touba. 2003. An efficient test vector compression scheme using selective huffman coding. IEEE Transactions on Computer-Aided Design 22, 6 (June 2003), 797--806. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. A. Jas, Y.-S. Chan, and Y.-S. Chang. 2006. An approach to minimizing functional constraints. In Proceedings of the Defect and Fault Tolerance in VLSI Systems. IEEE, 215--226. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. B. Koenemann. 1991. LFSR-coded test patterns for scan designs. In Proceedings of the European Test Conference. IEEE, 237--242.Google ScholarGoogle Scholar
  7. C. V. Krishna, A. Jas, and N. A. Touba. 2004. Achieving high encoding efficiency with partial dynamic LFSR reseeding. ACM Transactions on Design Automation of Electronic Systems 9, 4 (October 2004), 500--516. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. A. Larsson, E. Larsson, P. Eles, and Z. Peng. 2007. Optimized integration of test compression and sharing for SOC testing. In Proceedings of the Design, Automation and Test in Europe Conference. IEEE, 1--6. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. L. Li, K. Chakrabarty, and N. A. Touba. 2003. Test data compression using dictionaries with selective entries and fixed-length indices. ACM Transactions on Design Automation of Electronic Systems. 8, 4 (October 2003), 470--490. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. Y.-C. Lin, F. Lu, K. Yang, and K.-T. Cheng. 2005. Constraint extraction for pseudo-functional scan-based delay testing. In Proceedings of the Asia and South Pacific Design Automation Conference. ACM, 166--171. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. X. Lin and J. Rajski. 2012. On utilizing test cube properties to reduce test data volume further. In Proceedings of the Asian Test Symposium. IEEE, 83--88. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. L. Lingappan, S. Ravi, A. Raghunathan, N. K. Jha, and S. T. Chakradhar. 2006. Test-volume reduction in systems-on-a-chip using heterogeneous and multilevel compression techniques. IEEE Transactions on Computer-Aided Design 25, 10 (October 2006), 2193--2206. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. E. K. Moghaddam, J. Rajski, S. M. Reddy, and M. Kassab. 2010. At-speed scan test with low switching activity. In Proceedings of the VLSI Test Symposium. IEEE, 177--182. Google ScholarGoogle ScholarCross RefCross Ref
  14. M. Nourani and M. H. Tehranipour. 2005. RL-huffman encoding for test compression and power reduction in scan applications. ACM Transactions on Design Automation of Electronic Systems 10, 1 (January 2005), 91--115. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. I. Polian and F. Fujiwara. 2006. Functional constraints vs. test compression in scan-based delay testing. In Proceedings of the Design, Automation and Test in Europe Conference. IEEE, 1--6. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. I. Pomeranz. 2004. On the generation of scan-based test sets with reachable states for testing under functional operation conditions. In Proceedings of the Design Automation Conference. ACM, 928--933. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. I. Pomeranz. 2004. Reducing test data volume using p-testable scan chains in circuits with multiple scan chains. IEEE Transactions on Computer-Aided Design 23, 10 (October 2004), 1465--1476. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. I. Pomeranz. 2013. Transition fault simulation considering broadside tests as partially-functional broadside tests. IEEE Transactions on VLSI Systems 21, 7 (July 2013), 1359--1363. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. I. Pomeranz. 2013. Functional broadside tests with incompletely-specified scan-in states. IEEE Transactions on Computer-Aided Design 32, 9 (September 2013), 1445--1449. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. I. Pomeranz. 2016. LFSR-based generation of partially-functional broadside tests. IEEE Transactions on Computers. To appear.Google ScholarGoogle Scholar
  21. I. Pomeranz and S. M. Reddy. 2006. Generation of functional broadside tests for transition faults. IEEE Transactions on Computer-Aided Design 25, 10 (October 2006), 2207--2218. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. I. Pomeranz and S. M. Reddy. 2008. Primary input vectors to avoid in random test sequences for synchronous sequential circuits. IEEE Transactions on Computer-Aided Design 27, 1 (January 2008), 193--197. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. I. Pomeranz and S. M. Reddy. 2009. Definition and generation of partially-functional broadside tests. IET Computers & Digital Techniques 3, 1 (January 2009), 1--13. Google ScholarGoogle ScholarCross RefCross Ref
  24. I. Pomeranz and S. M. Reddy. 2010. On reset based functional broadside tests. In Proceedings of the Design Automation and Test in Europe Conference. IEEE, 1438--1443. Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. J. Rajski, J. Tyszer, M. Kassab, N. Mukherjee, R. Thompson, K.-H. Tsai, A. Hertwig, N. Tamarapalli, G. Mrugalski, G. Eide, and J. Qian. 2002. Embedded deterministic test for low cost manufacturing test. In Proceedings of the International Test Conference. IEEE, 301--310. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. J. Rearick. 2001. Too much delay fault coverage is a bad thing. In Proceedings of the International Test Conference. IEEE, 624--633. Google ScholarGoogle ScholarDigital LibraryDigital Library
  27. X. Ruan and R. S. Katti. 2007. Data-independent pattern run-length compression for testing embedded cores in SoCs. IEEE Transactions on Computers 56, 4 (April 2007), 545--556. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. J. Saxena, K. M. Butler, V. B. Jayaram, S. Kundu, N. V. Arvind, P. Sreeprakash, and M. Hachinger. 2003. A case study of ir-drop in structured at-speed testing. In Proceedings of the International Test Conference. IEEE, 1098--1104. Google ScholarGoogle ScholarCross RefCross Ref
  29. S. Sde-Paz and E. Salomon. 2008. Frequency and power correlation between at-speed scan and functional tests. In Proceedings of the International Test Conference. IEEE, Paper 13.3, 1--9. Google ScholarGoogle ScholarCross RefCross Ref
  30. X. Sun, L. Kinney, and B. Vinnakota. 2004. Combining dictionary coding and LFSR reseeding for test data compression. In Proceedings of the Design Automation Conference. ACM, 944--947. Google ScholarGoogle ScholarDigital LibraryDigital Library
  31. M. Syal, K. Chandrasekar, V. Vimjam, M. S. Hsiao, Y.-S. Chang, and S. Chakravarty. 2006. A study of implication based pseudo functional testing. In Proceedings of the International Test Conference. IEEE, 1--10. Google ScholarGoogle ScholarCross RefCross Ref
  32. V. Tenentes, X. Kavousianos, and E. Kalligeros. 2008. State skip LFSRs: Bridging the gap between test data compression and test set embedding for IP cores. In Proceedings of the Design, Automation and Test in Europe Conference. IEEE, 474--479. Google ScholarGoogle ScholarDigital LibraryDigital Library
  33. V. Tenentes and X. Kavousianos. 2013. High-quality statistical test compression with narrow ATE interface. IEEE Transactions on Computer-Aided Design 32, 9 (September 2013), 1369--1382. Google ScholarGoogle ScholarDigital LibraryDigital Library
  34. N. A. Touba. 2006. Survey of test vector compression techniques. IEEE Design & Test 23, 4 (April 2006), 294--303. Google ScholarGoogle ScholarDigital LibraryDigital Library
  35. F. G. Wolff, C. Papachristou, and D. R. McIntyre. 2004. Test compression and hardware decompression for scan-based SoCs. In Proceedings of the Design, Automation and Test in Europe Conference. IEEE, 716--717. Google ScholarGoogle ScholarDigital LibraryDigital Library
  36. D. Xiang, Z. Chen, and L.-T. Wang. 2012. Scan flip-flop grouping to compress test data and compact test responses for launch-on-capture delay testing. ACM Transactions on Design Automation of Electronic Systems 17, 2 (April 2012), 18:1--18:24. Google ScholarGoogle ScholarDigital LibraryDigital Library
  37. T. Zhang and D. M. H. Walker. 2013. Power supply noise control in pseudo functional test. In Proceedings of the VLSI Test Symposium. IEEE, 1--6. Google ScholarGoogle ScholarDigital LibraryDigital Library
  38. Z. Zhang, S. M. Reddy, and I. Pomeranz. 2005. On generating pseudo-functional delay fault tests for scan designs. In Proceedings of the International Symposium on Defect and Fault Tolerance in VLSI Systems. IEEE, 398--405. Google ScholarGoogle ScholarDigital LibraryDigital Library
  39. Q. Zhou and K. J. Balakrishnan. 2007. Test cost reduction for SoC using a combined approach to test data compression and test scheduling. In Proceedings of the Design, Automation and Test in Europe Conference. IEEE, 39--44. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Periodic Scan-In States to Reduce the Input Test Data Volume for Partially Functional Broadside Tests

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in

    Full Access

    • Published in

      cover image ACM Transactions on Design Automation of Electronic Systems
      ACM Transactions on Design Automation of Electronic Systems  Volume 22, Issue 1
      January 2017
      463 pages
      ISSN:1084-4309
      EISSN:1557-7309
      DOI:10.1145/2948199
      • Editor:
      • Naehyuck Chang
      Issue’s Table of Contents

      Copyright © 2016 ACM

      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 27 May 2016
      • Accepted: 1 March 2016
      • Revised: 1 February 2016
      • Received: 1 December 2015
      Published in todaes Volume 22, Issue 1

      Permissions

      Request permissions about this article.

      Request Permissions

      Check for updates

      Qualifiers

      • research-article
      • Research
      • Refereed
    • Article Metrics

      • Downloads (Last 12 months)6
      • Downloads (Last 6 weeks)0

      Other Metrics

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader