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Vector Processors for Energy-Efficient Embedded Systems

Published: 19 June 2016 Publication History

Abstract

High-performance embedded processors are frequently designed as arrays of small, in-order scalar cores, even when their workloads exhibit high degrees of data-level parallelism (DLP). We show that these multiple instruction, multiple data (MIMD) systems can be made more efficient by instead directly exploiting DLP using a modern vector architecture. In our study, we compare arrays of scalar cores to vector machines of comparable silicon area and power consumption. Since vectors provide greater performance across the board - in some cases even with better programmability - we believe that embedded system designers should increasingly pursue vector architectures for machines at this scale.

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  1. Vector Processors for Energy-Efficient Embedded Systems

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    cover image ACM Other conferences
    MES '16: Proceedings of the Third ACM International Workshop on Many-core Embedded Systems
    June 2016
    35 pages
    ISBN:9781450342629
    DOI:10.1145/2934495
    This work is licensed under a Creative Commons Attribution-ShareAlike International 4.0 License.

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    Published: 19 June 2016

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    • (2024)ZeroVex: A Scalable and High-performance RISC-V Vector Processor Core for Embedded Systems2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP)10.1109/ASAP61560.2024.00018(32-33)Online publication date: 24-Jul-2024
    • (2024)GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)10.1109/APCCAS62602.2024.10808289(702-706)Online publication date: 7-Nov-2024
    • (2024)ImSPU: Implicit Sharing of Computation Resources Between Vector and Scalar Processing UnitsEuro-Par 2024: Parallel Processing10.1007/978-3-031-69766-1_6(77-90)Online publication date: 26-Aug-2024
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