P. Kollig
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- 5.Kollig, P., AI-Hashimi, B.M., Abbott, K.M.: 'FPGA implementation of high performance FIR filters', Proceedings of the ISCAS, Hong Kong, 1997, pp. 2240- 2243Google ScholarCross Ref
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- 9.McQuillan, S.E., McCanny, J.V.: 'A systematic methodology for the design of high performance recursive digital filters,' IEEE Transactions on Computers, 1995, 44 (8) pp. 971-982 Google ScholarDigital Library
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- 15.Kollig, P.: 'Algorithms for scheduling, allocation and binding in high-level synthesis.' Ph.D. Dissertation, School of Engineering and Advanced Technology, Staffordshire University, April 1998Google Scholar
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Index Terms
- Reduction of latency and resource usage in bit-level pipelined data paths for FPGAs
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