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Analyzing Consistency Issues in HMC Atomics

Published: 03 October 2016 Publication History

Abstract

As 3D stacked technology gets popular, Processing-in-memory (PIM) is gaining momentum. HMC 2.0 specification offers a fine-grained, instruction granularity offloading capability to the host processor. The current work studies the potential consistency issues which arise from offloading the atomic instructions from CPU to HMC as present in the current specification.

References

[1]
H. M. C. Consortium. Hybrid memory cube specification 2.0. 2014.
[2]
Q. Ho, J. Cipar, H. Cui, S. Lee, J. K. Kim, P. B. Gibbons, G. A. Gibson, G. Ganger, and E. Xing. More Effective Distributed ML via a Stale Synchronous Parallel Parameter Server. In NIPS '13. 2013.
[3]
H. Schweizer, M. Besta, and T. Hoefler. Evaluating the Cost of Atomic Operations on Modern Architectures. ACM, Oct. 2015. Proceedings of the 24th International Conference on Parallel Architectures and Compilation (PACT'15).

Cited By

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  • (2017)CAIROACM Transactions on Architecture and Code Optimization10.1145/315528714:4(1-25)Online publication date: 20-Dec-2017
  • (2017)GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2017.54(457-468)Online publication date: Feb-2017
  1. Analyzing Consistency Issues in HMC Atomics

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    cover image ACM Other conferences
    MEMSYS '16: Proceedings of the Second International Symposium on Memory Systems
    October 2016
    463 pages
    ISBN:9781450343053
    DOI:10.1145/2989081
    Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 03 October 2016

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    Cited By

    View all
    • (2017)CAIROACM Transactions on Architecture and Code Optimization10.1145/315528714:4(1-25)Online publication date: 20-Dec-2017
    • (2017)GraphPIM: Enabling Instruction-Level PIM Offloading in Graph Computing Frameworks2017 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2017.54(457-468)Online publication date: Feb-2017

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