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Evaluation of Latch-based Physical Random Number Generator Implementation on 40 nm ASICs

Published: 28 October 2016 Publication History

Abstract

In the age of the IoT (Internet of Things), a random number generator plays an important role of generating encryption keys and authenticating a piece of an embedded equipment. The random numbers are required to be uniformly distributed statistically and unpredictable. To satisfy the requirements, a physical true random number generator (TR-NG) is used. In this paper, we implement a TRNG using an SR latch on 40 nm CMOS ASIC. This TRNG generates the random number by exclusive ORing (XORing) the outputs of 256 SR latches. We evaluate the random number generated using statistical tests in accordance with BSI AIS 20/31 and using an IID (Independent and Identically Distributed) test, and the entropy estimation in accordance with NIST SP800-90B changing the supply voltage and environmental temperature within its rated values. As a result, the TRNG passed all the tests except in a few cases. From this experiment, we found that the TRNG has a robustness against environmental change. The power consumption is 18.8 micro Watt at 2.5 MHz. This TRNG is suitable for embedded systems to improve security in IoT systems.

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    cover image ACM Conferences
    TrustED '16: Proceedings of the 6th International Workshop on Trustworthy Embedded Devices
    October 2016
    74 pages
    ISBN:9781450345675
    DOI:10.1145/2995289
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 28 October 2016

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    Author Tags

    1. AIS20/30
    2. SP800-90B
    3. SR latch
    4. metastability
    5. physical true random number generator
    6. trng

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    TrustED '16 Paper Acceptance Rate 6 of 12 submissions, 50%;
    Overall Acceptance Rate 24 of 49 submissions, 49%

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    • (2023)FPGA Latch Primitive based Efficient True Random Number Generators2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS58634.2023.10382907(1-8)Online publication date: 4-Dec-2023
    • (2022)A Unified PUF and Crypto Core Exploiting the Metastability in LatchesFuture Internet10.3390/fi1410029814:10(298)Online publication date: 17-Oct-2022
    • (2022)A Unified NVRAM and TRNG in Standard CMOS TechnologyIEEE Access10.1109/ACCESS.2022.319363910(79213-79221)Online publication date: 2022
    • (2022)A Robust and Healthy Against PVT Variations TRNG Based on Frequency CollapseIEEE Access10.1109/ACCESS.2022.316769010(41852-41862)Online publication date: 2022
    • (2021)The Cost of a True Random Bit—On the Electronic Cost Gain of ASIC Time-Domain-Based TRNGsCryptography10.3390/cryptography50300255:3(25)Online publication date: 18-Sep-2021
    • (2021)A true random number generator that utilizes thermal noise in a programmable system‐on‐chip (PSoC)International Journal of Circuit Theory and Applications10.1002/cta.304649:10(3354-3367)Online publication date: 5-May-2021
    • (2020)PUF-Based Secure Chaotic Random Number Generator Design MethodologyIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.2979269(1-5)Online publication date: 2020
    • (2019)A light-weight implementation of latch-based true random number generator2019 15th International Wireless Communications & Mobile Computing Conference (IWCMC)10.1109/IWCMC.2019.8766516(901-906)Online publication date: Jun-2019
    • (2018)A latch-latch composition of metastability-based true random number generator for Xilinx FPGAsIEICE Electronics Express10.1587/elex.15.2018038615:10(20180386-20180386)Online publication date: 2018
    • (2017)TVL-TRNG: Sub-Microwatt True Random Number Generator Exploiting Metastability in Ternary Valued Latches2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL)10.1109/ISMVL.2017.10(130-135)Online publication date: May-2017

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