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An Incremental Methodology for Energy Measurement and Modeling

Published: 17 April 2017 Publication History

Abstract

This paper presents an empirical approach to measuring and modeling the energy consumption of multicore processors.The modeling approach allows us to find a breakdown of the energy consumption among a set of key hardware components, also called HW nodes. We explicitly model the front-end and the back-end in terms of the number of instructions executed. We also model the L1, L2 and L3 caches. Furthermore, we explicitly model the static and dynamic energy consumed by the the uncore and core components. From a software perspective, our methodology allows us to correlate energy to the executed code, which helps find opportunities for code optimization and tuning.
We use binary analysis and hardware counters for performance characterization. Although, we use the on-chip counters (RAPL) for energy measurement, our methodology does not rely on a specific method for energy measurement. Thus, it is portable and easy to deploy in various computing environments. We validate our energy model using two Intel processors with a set of HPC codelets, where data sizes are varied to come from the L1, L2 and L3 caches and show 3% average modeling error. We present a comprehensive analysis and show energy consumption differences between kernels and relate those differences to the algorithms that are implemented. Finally, we discuss how vectorization leads to energy savings compared to non-vectorized codes.

References

[1]
R. Bertran, M. Gonzalez, X. Martorell, N. Navarro, and E. Ayguade. Decomposable and responsive power models for multicore processors using performance counters. In Proceedings of the 24th ACM International Conference on Supercomputing, ICS '10, pages 147--158, New York, NY, USA, 2010. ACM.
[2]
J. M. Cebrián, L. Natvig, and J. C. Meyer. Performance and energy impact of parallelization and vectorization techniques in modern microprocessors. Computing, 96(12):1179--1193, Dec. 2014.
[3]
M. Curtis-Maury, F. Blagojevic, C. D. Antonopoulos, and D. S. Nikolopoulos. Prediction-based power-performance adaptation of multithreaded scientific codes. IEEE Transactions on Parallel and Distributed Systems, 19(10):1396--1410, Oct 2008.
[4]
K. Czechowski, V. W. Lee, E. Grochowski, R. Ronen, R. Singhal, R. Vuduc, and P. Dubey. Improving the energy efficiency of big cores. SIGARCH Comput. Archit. News, 42(3):493--504, June 2014.
[5]
H. David, E. Gorbatov, U. R. Hanebutte, R. Khanna, and C. Le. Rapl: Memory power estimation and capping. In Proceedings of the 16th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED '10, pages 189--194, New York, NY, USA, 2010. ACM.
[6]
B. Goel and S. A. McKee. A methodology for modeling dynamic and static power consumption for multicore processors. In 2016 IEEE International Parallel and Distributed Processing Symposium (IPDPS), pages 273--282, May 2016.
[7]
R. Gonzalez and M. Horowitz. Energy dissipation in general purpose processors. In Low Power Electronics, 1995., IEEE Symposium on, pages 12--13. IEEE, 1995.
[8]
V. Gupta, P. Brett, D. Koufaty, D. Reddy, S. Hahn, K. Schwan, and G. Srinivasa. The forgotten 'uncore': On the energy-efficiency of heterogeneous cores. In Proceedings of the 2012 USENIX Conference on Annual Technical Conference, USENIX ATC'12, pages 34--34, Berkeley, CA, USA, 2012. USENIX Association.
[9]
D. Hackenberg, T. Ilsche, R. Schone, D. Molka, M. Schmidt, and W. E. Nagel. Power measurement techniques on standard compute nodes: A quantitative comparison. 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 0:194--204, 2013.
[10]
Intel Corporation. Intel 64 and IA-32 architectures software developer's manual: System programming guide, September 2016.
[11]
W. Jalby, D. C. Wong, D. J. Kuck, J. Acquaviva, and J. C. Beyler. Measuring computer performance. In M. W. Berry, K. A. Gallivan, E. Gallopoulos, A. Grama, and B. Philippe, editors, High-Performance Scientific Computing - Algorithms and Applications., pages 75--95. Springer, 2012.
[12]
D. J. Kuck. Computational Capacity-Based Codesign of Computer Systems, pages 45--73. Springer London, London, 2012.
[13]
S. Li, J. H. Ahn, R. D. Strong, J. B. Brockman, D. M. Tullsen, and N. P. Jouppi. Mcpat: An integrated power, area, and timing modeling framework for multicore and manycore architectures. In Proceedings of the 42Nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 42, pages 469--480, New York, NY, USA, 2009. ACM.
[14]
S. Li, K. Chen, J. H. Ahn, J. B. Brockman, and N. P. Jouppi. Cacti-p: Architecture-level modeling for sram-based structures with advanced leakage reduction techniques. In Proceedings of the International Conference on Computer-Aided Design, ICCAD '11, pages 694--701, Piscataway, NJ, USA, 2011. IEEE Press.
[15]
MAQAO. Maqao project, 2016.
[16]
A. Mazouz, B. Pradelle, and W. Jalby. Statistical validation methodology of cpu power probes. In Revised Selected Papers, Part I, of the Euro-Par 2014 International Workshops on Parallel Processing - Volume 8805, pages 487--498, New York, NY, USA, 2014. Springer-Verlag New York, Inc.
[17]
A. Mazouz, S. A. A. Touati, and D. Barthou. Study of variations of native program execution times on multi-core architectures. In L. Barolli, F. Xhafa, S. Vitabile, and H. Hsu, editors, CISIS 2010, The Fourth International Conference on Complex, Intelligent and Software Intensive Systems, Krakow, Poland, 15--18 February 2010, pages 919--924. IEEE Computer Society, 2010.
[18]
J. C. McCullough, Y. Agarwal, J. Chandrashekar, S. Kuppuswamy, A. C. Snoeren, and R. K. Gupta. Evaluating the effectiveness of model-based power characterization. In Proceedings of the 2011 USENIX Conference on USENIX Annual Technical Conference, USENIXATC'11, pages 12--12, Berkeley, CA, USA, 2011. USENIX Association.
[19]
J. Noudohouenou, V. Palomares, W. Jalby, D. C. Wong, D. J. Kuck, and J. C. Beyler. Simsys: A performance simulation framework. In Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO '13, pages 1:1--1:8, New York, NY, USA, 2013. ACM.
[20]
W. H. Press, S. A. Teukolsky, W. T. Vetterling, and B. P. Flannery. Numerical Recipes in C (2Nd Ed.): The Art of Scientific Computing. Cambridge University Press, New York, NY, USA, 1992.
[21]
Y. S. Shao and D. M. Brooks. Energy characterization and instruction-level energy model of intel's xeon phi processor. In International Symposium on Low Power Electronics and Design (ISLPED), Beijing, China, September 4-6, 2013, pages 389--394, 2013.
[22]
V. Spiliopoulos, A. Sembrant, and S. Kaxiras. Power-sleuth: A tool for investigating your program's power behavior. In 2012 IEEE 20th International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems, pages 241--250, Aug 2012.

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cover image ACM Conferences
ICPE '17: Proceedings of the 8th ACM/SPEC on International Conference on Performance Engineering
April 2017
450 pages
ISBN:9781450344043
DOI:10.1145/3030207
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 17 April 2017

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Author Tags

  1. energy modeling
  2. performance evaluation
  3. rapl

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ICPE '17 Paper Acceptance Rate 27 of 83 submissions, 33%;
Overall Acceptance Rate 252 of 851 submissions, 30%

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  • (2023)Comparative Analysis of Energy Consumption in Text Processing ModelsAdvancements in Smart Computing and Information Security10.1007/978-3-031-23092-9_9(107-116)Online publication date: 11-Jan-2023
  • (2022)Understanding the Energy Consumption of HPC Scale Artificial IntelligenceHigh Performance Computing10.1007/978-3-031-23821-5_10(131-144)Online publication date: 21-Dec-2022
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