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- Tai CLin R(2019)Morphed Standard Cell Layouts for Pin Length Reduction2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI.2019.00025(94-99)Online publication date: Jul-2019
- Kang IPark DHan CCheng CHu S(2018)Fast and precise routability analysis with conditional design rulesProceedings of the 20th System Level Interconnect Prediction Workshop10.1145/3225209.3225210(1-8)Online publication date: 23-Jun-2018
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