Abstract
In this paper, we propose an FPGA solver for partial maximum satisfiability (PMS) problems based on the Dist algorithm, which is one of the best performing stochastic local search algorithms for PMS problems. The Dist algorithm searches for a truth assignment for the variables that satisfies all of the hard clauses and as many soft clauses as possible by iteratively selecting a variable using a heuristic and flipping its truth value. During each iteration, new candidate variables for flipping are generated and existing ones may disappear. In our solver, the variables that may become new candidates for flipping are evaluated by parallel and pipeline processing, and then only the variables that actually become the candidates for flipping are extracted and gathered up in concurrent with the pipeline processing. The extraction process is not influenced by the number of the new candidates or their random generation, which minimizes the disturbance of the parallel and pipeline processing. Our FPGA solver can solve large PMS problems up to 7.74 times faster than running Dist on CPU.
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