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Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition

Published: 10 May 2017 Publication History

Abstract

Approximate high radix dividers (HR-AXDs) are proposed and investigated in this paper. High-radix division is reviewed and inexact computing is introduced at different levels. Design parameters such as number of bits (N) and radix (r) are considered in the analysis; the replacement schemes with inexact cells and truncation schemes of exact cells in the binary signed-digit adder array is introduced. Circuit-level performance and the error characteristics of the inexact high radix dividers are analyzed for the proposed designs. The combined assessment of the normal error distance, power dissipation and delay is investigated and applications of approximate high-radix dividers are treated in detail. The simulation results show that the proposed approximate dividers offer extensive saving in terms of power dissipation, circuit complexity and delay, while only incurring in a small degradation in accuracy thus making them possibly suitable and interesting to some applications and domains such as low power/mobile computing.

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M. D. Ercegovac and T. Lang, Digital Arithmetic: Morgan Kaufmann, 2004.
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L. Chen, J. Han, W. Liu, and F. Lombardi, "On the Design of Approximate Restoring Dividers for Error-Tolerant Applications," Computers, IEEE Transactions on, vol. PP, pp. 1--1, 2015.
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  1. Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition

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      cover image ACM Conferences
      GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017
      May 2017
      516 pages
      ISBN:9781450349727
      DOI:10.1145/3060403
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      Published: 10 May 2017

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      Author Tags

      1. approximate divider
      2. high-radix
      3. normalized error distance
      4. power dissipation

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      • (2024)PACE: A Piece-Wise Approximate Floating-Point Divider with Runtime Configurability and High Energy EfficiencyACM Transactions on Design Automation of Electronic Systems10.1145/370663430:2(1-23)Online publication date: 16-Dec-2024
      • (2023)Approximate Computing: Hardware and Software Techniques, Tools and Their ApplicationsJournal of Circuits, Systems and Computers10.1142/S021812662430001033:04Online publication date: 20-Sep-2023
      • (2023)Design of Error Tolerant Subtractor using Truncation Approximation Technique2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)10.1109/DELCON57910.2023.10127573(1-6)Online publication date: 24-Feb-2023
      • (2023)A Survey of Approximate Computing: From Arithmetic Units Design to High-Level ApplicationsJournal of Computer Science and Technology10.1007/s11390-023-2537-y38:2(251-272)Online publication date: 30-Mar-2023
      • (2022)Energy efficient logarithmic-based approximate divider for ASIC and FPGA-based implementationsMicroprocessors & Microsystems10.1016/j.micpro.2022.10449890:COnline publication date: 1-Apr-2022
      • (2022)Security Vulnerabilities and Countermeasures for Approximate CircuitsApproximate Computing10.1007/978-3-030-98347-5_11(269-286)Online publication date: 18-Mar-2022
      • (2021)Low-Latency Bit-Accurate Architecture for Configurable Precision Floating-Point DivisionApplied Sciences10.3390/app1111498811:11(4988)Online publication date: 28-May-2021
      • (2021)An Efficient and Fast Softmax Hardware Architecture (EFSHA) for Deep Neural Networks2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS)10.1109/AICAS51828.2021.9458541(1-4)Online publication date: 6-Jun-2021
      • (2021)Review of Basic Classes of Dividers Based on Division AlgorithmIEEE Access10.1109/ACCESS.2021.30557359(23035-23069)Online publication date: 2021
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