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Exploring Heterogeneous-ISA Core Architectures for High-Performance and Energy-Efficient Mobile SoCs

Published: 10 May 2017 Publication History

Abstract

In this paper, we explore opportunities to increase energy efficiency by providing cores with restricted functionality, but without necessarily impacting performance. We aim to achieve this by removing support for complex but less frequently executed instructions since instruction mixes used by real-world workloads are often heavily biased. We investigate which instructions are worthwhile to remove by analyzing a subset of instructions in the ARM ISA and their corresponding logic burden in the microarchitecture. We propose a heterogeneous-ISA system to achieve energy efficiency without performance degradation using a system architecture that combines both full- and reduced-ISA cores. Results show that by providing the flexibility of heterogeneous-ISA cores, the proposed system can improve energy efficiency by 12% on average and up to 15% for applications that do not require NEON support, all without performance overhead.

References

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ARM big.LITTLE Processing. http://www.arm.com/products/processors/technologies/biglittleprocessing.php.
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Arndale Board. http://www.arndaleboard.org.
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Qemu. http://www.qemu.org.
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A. Aminot et al. FPU Speedup Estimation for Task Placement Optimization on Asymmetric Multicore Designs. In MCSoC, 2015.
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E. Blem et al. Power Strugles: Revisiting the RISC vs. CISC Debate on Contemporary ARM and x86 Architectures. In HPCA, 2013.
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A. V. et al. Harnessing ISA Diversity: Design of a Heterogeneous-ISA Chip Multiprocessor. In ISCA, 2014.
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M. D. et al. Execution Migration in a Heterogeneous-ISA Chip Multiprocessor. In ASPLOS, 2012.
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R. K. et al. Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction. In Micro, 2003.
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S. Li et al. McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures. In Micro, 2009.
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T. Li et al. Operating System Support for Overlapping-ISA Heterogeneous Multi-core Architectures. In HPCA, 2010.
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W. Lee et al. Exploring opportunities for heterogeneous-isa core architectures in high-performance mobile socs. Technical Report UT-CERC-17-01, The University of Texas At Austin, 2017.

Cited By

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  • (2024)UNIFICO: Thread Migration in Heterogeneous-ISA CPUs without State TransformationProceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction10.1145/3640537.3641565(86-99)Online publication date: 17-Feb-2024
  • (2021)Property-driven Automatic Generation of Reduced-ISA Hardware2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586090(349-354)Online publication date: 5-Dec-2021
  • (2021)Improving multitask performance and energy consumption with partial-ISA multicoresJournal of Parallel and Distributed Computing10.1016/j.jpdc.2021.02.007153(1-14)Online publication date: Jul-2021
  • Show More Cited By

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  1. Exploring Heterogeneous-ISA Core Architectures for High-Performance and Energy-Efficient Mobile SoCs

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    cover image ACM Conferences
    GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017
    May 2017
    516 pages
    ISBN:9781450349727
    DOI:10.1145/3060403
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 10 May 2017

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    1. mobile heterogeneous systems

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    • Semiconductor Research Corporation

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    May 10 - 12, 2017
    Alberta, Banff, Canada

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    GLSVLSI '17 Paper Acceptance Rate 48 of 197 submissions, 24%;
    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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    Cited By

    View all
    • (2024)UNIFICO: Thread Migration in Heterogeneous-ISA CPUs without State TransformationProceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction10.1145/3640537.3641565(86-99)Online publication date: 17-Feb-2024
    • (2021)Property-driven Automatic Generation of Reduced-ISA Hardware2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586090(349-354)Online publication date: 5-Dec-2021
    • (2021)Improving multitask performance and energy consumption with partial-ISA multicoresJournal of Parallel and Distributed Computing10.1016/j.jpdc.2021.02.007153(1-14)Online publication date: Jul-2021
    • (2020)Tuning the ISA for increased heterogeneous computation in MPSoCs2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116547(1722-1727)Online publication date: Mar-2020
    • (2020)Enhancing Multithreaded Performance of Asymmetric Multicores with SIMD Offloading2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116466(967-970)Online publication date: Mar-2020
    • (2020)Optimizing RISC-V ISA Usage by Sharing Coprocessors on MPSoC2020 IEEE Latin-American Test Symposium (LATS)10.1109/LATS49555.2020.9093677(1-5)Online publication date: Mar-2020
    • (2019)Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore ArchitecturesProceedings of the 10th International Workshop on Programming Models and Applications for Multicores and Manycores10.1145/3303084.3309492(51-60)Online publication date: 17-Feb-2019
    • (2019)Trimming the ISA to Optimize Area and EDP in Heterogeneous CMPs2019 31st International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)10.1109/SBAC-PAD.2019.00016(17-24)Online publication date: Oct-2019
    • (2019)Increasing MPSoCs design space with partial-ISA processors2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)10.1109/ICECS46596.2019.8964683(678-681)Online publication date: Nov-2019
    • (2019)Composite-ISA Cores: Enabling Multi-ISA Heterogeneity Using a Single ISA2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2019.00026(42-55)Online publication date: Feb-2019
    • Show More Cited By

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