research-article

Design of Approximate Logarithmic Multipliers

Authors:

Fabrizio LombardiAuthors Info & Claims

GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017

Pages 47 - 52

https://doi.org/10.1145/3060403.3060409

Published: 10 May 2017 Publication History

Abstract

Lower power has been a main challenge for IC design. Approximate computing provides a new approach for low power design. Logarithmic multiplier (LM) is a kind of approximate multipliers in nature. In this paper, the design of both non-iterative and iterative approximate LMs (IALM) are studied to further reduce the power consumption and improve the performance. Non-iterative approximate LMs (ALM) that use three inexact mantissa adders are presented. The proposed IALMs use set-one adder in both mantissa adders during the iteration and they also use lower-part-or adders and approximate mirror adders for the final addition. The error analysis and simulation results are also provided. It is found that the proposed approximate LMs with appropriate number of inexact bits has achieved even higher accuracy and lower power consumption compared with the conventional LMs using exact units. To be exact, compared with conventional LMs with exact units, the normalized mean error distance (NMED) of 16-bit approximate LMs is decreased by up to 18% and the power-delay product (PDP) has a reduction of up to 37%. The proposed approximate LMs are also compared with previous approximate Booth multipliers. It is found that approximate LMs are more suitable for applications allowing large errors but require less power consumption, while approximate Booth multipliers fit for applications allowing larger power but require less errors.

References

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Digital Library

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Liu, W., Qian L., Wang, C., Jiang H., Han, J. and Lombardi, F., 2017. Design of approximate radix-4 Booth multipliers for error-tolerant computing", IEEE Trans. Computers, (Feb. 2017). (Accepted)

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Digital Library

Cited By

Wu YChen CXiao WWang XWen CHan JYin XQian WZhuo C(2024)A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to CircuitsACM Transactions on Design Automation of Electronic Systems10.1145/361029129:1(1-37)Online publication date: 13-Jan-2024
https://dl.acm.org/doi/10.1145/3610291
Shan RGao H(2023)Design of Approximate Multi-Granularity Multiply-Accumulate Unit for Convolutional Neural NetworkProceedings of the 2023 6th International Conference on Artificial Intelligence and Pattern Recognition10.1145/3641584.3641720(909-917)Online publication date: 22-Sep-2023
https://dl.acm.org/doi/10.1145/3641584.3641720
Yao SShen L(2023)ImprLM: An Improved Logarithmic Multiplier Design Approach via Iterative Linear-Compensation and Modified Dynamic Segment2023 IEEE 41st International Conference on Computer Design (ICCD)10.1109/ICCD58817.2023.00020(66-69)Online publication date: 6-Nov-2023
https://doi.org/10.1109/ICCD58817.2023.00020
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Index Terms

Design of Approximate Logarithmic Multipliers
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits
      2. Combinational circuits

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cover image ACM Conferences

GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017

May 2017

516 pages

ISBN:9781450349727

DOI:10.1145/3060403

General Chairs:
Laleh Behjat
University of Calgary, Canada
,
Jie Han
University of Alberta, Canada
,
Program Chairs:
Miroslav N. Velev
Aries Design Automation, USA
,
Deming Chen
University of Illinois, USA

Copyright © 2017 ACM.

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SIGDA: ACM Special Interest Group on Design Automation
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Association for Computing Machinery

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Publication History

Published: 10 May 2017

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Nature Science Foundation of Jiangsu Province
National Natural Science Foundation of China

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GLSVLSI '17

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SIGDA

GLSVLSI '17: Great Lakes Symposium on VLSI 2017

May 10 - 12, 2017

Alberta, Banff, Canada

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GLSVLSI '17 Paper Acceptance Rate 48 of 197 submissions, 24%;

Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Great Lakes Symposium on VLSI 2025

June 30 - July 2, 2025

New Orleans , LA , USA

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Cited By

Wu YChen CXiao WWang XWen CHan JYin XQian WZhuo C(2024)A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to CircuitsACM Transactions on Design Automation of Electronic Systems10.1145/361029129:1(1-37)Online publication date: 13-Jan-2024
https://dl.acm.org/doi/10.1145/3610291
Shan RGao H(2023)Design of Approximate Multi-Granularity Multiply-Accumulate Unit for Convolutional Neural NetworkProceedings of the 2023 6th International Conference on Artificial Intelligence and Pattern Recognition10.1145/3641584.3641720(909-917)Online publication date: 22-Sep-2023
https://dl.acm.org/doi/10.1145/3641584.3641720
Yao SShen L(2023)ImprLM: An Improved Logarithmic Multiplier Design Approach via Iterative Linear-Compensation and Modified Dynamic Segment2023 IEEE 41st International Conference on Computer Design (ICCD)10.1109/ICCD58817.2023.00020(66-69)Online publication date: 6-Nov-2023
https://doi.org/10.1109/ICCD58817.2023.00020
Sarkar ABhattacharjya RGoswami APoddar S(2021)SEAMBA: A Semi-Approximate Multiplier using Block-Based Approach and Rounding2021 International Symposium on Devices, Circuits and Systems (ISDCS)10.1109/ISDCS52006.2021.9397894(1-6)Online publication date: 3-Mar-2021
https://doi.org/10.1109/ISDCS52006.2021.9397894
Wang RFan XLi QLiu HLu S(2021)AL-MAC: Adaptive Error Compensation Approximate MAC2021 4th International Conference on Circuits, Systems and Simulation (ICCSS)10.1109/ICCSS51193.2021.9464180(56-61)Online publication date: 26-May-2021
https://doi.org/10.1109/ICCSS51193.2021.9464180
Bhattacharjya RKanani AGoel N(2020)ReARM: A Reconfigurable Approximate Rounding-Based Multiplier for Image Processing2020 24th International Symposium on VLSI Design and Test (VDAT)10.1109/VDAT50263.2020.9190474(1-4)Online publication date: Jul-2020
https://doi.org/10.1109/VDAT50263.2020.9190474
Gao MQu G(2020)Estimate and Recompute: A Novel Paradigm for Approximate Computing on Data Flow GraphsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.288966239:2(335-345)Online publication date: Feb-2020
https://doi.org/10.1109/TCAD.2018.2889662
Liu WGu CO'Neill MQu GMontuschi PLombardi F(2020)Security in Approximate Computing and Approximate Computing for Security: Challenges and OpportunitiesProceedings of the IEEE10.1109/JPROC.2020.3030121108:12(2214-2231)Online publication date: Dec-2020
https://doi.org/10.1109/JPROC.2020.3030121
Kim MBarrio AOliveira LHermida RBagherzadeh N(2019)Efficient Mitchell’s Approximate Log Multipliers for Convolutional Neural NetworksIEEE Transactions on Computers10.1109/TC.2018.288074268:5(660-675)Online publication date: 1-May-2019
https://doi.org/10.1109/TC.2018.2880742
Kim MBarrio AHermida RBagherzadeh NShin Y(2018)Low-power implementation of mitchell's approximate logarithmic multiplication for convolutional neural networksProceedings of the 23rd Asia and South Pacific Design Automation Conference10.5555/3201607.3201750(617-622)Online publication date: 22-Jan-2018
https://dl.acm.org/doi/10.5555/3201607.3201750
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