Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage for FinFET Based Embedded Systems
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- Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage for FinFET Based Embedded Systems
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- General Chairs:
- Laleh Behjat,
- Jie Han,
- Program Chairs:
- Miroslav N. Velev,
- Deming Chen
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- SIGDA: ACM Special Interest Group on Design Automation
- IEEE CEDA
- IEEE CASS
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New York, NY, United States
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