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A Maze Routing-Based Algorithm for ML-OARST with Pre-Selecting and Re-Building Steiner Points

Published: 10 May 2017 Publication History

Abstract

The benefits of applying maze routing algorithm over non-maze routing based methods include the feasibility of imposing various additional constraints on routing graphs. However, the much higher complexity of a multi-layer routing graph than that of a single-layer routing graph significantly increases the required runtime of conducting maze routing to solve the multi-layer obstacle-avoiding rectilinear Steiner tree (ML-OARST) problem, making applying maze routing to this problem infeasible. In this paper, we present a maze routing-based algorithm with the proposed Steiner point pre-selection to guide the construction of a ML-OARST. This can achieve a favorable balance between quality and runtime. The quality of routing is determined by total cost, that is, the summation of wire-length and via cost. To improve the flexibility of routing tree generation, we also propose a rip-up and re-building strategy for altering Steiner points and tree topology. Compared with a multi-layer multi-terminal maze routing algorithm, our algorithm can reduce the total cost by 4.8% on average and achieve 45x runtime speed-up averagely; moreover, our algorithm outperforms the state-of-the-art ML-OARST method using computational geometry techniques in terms of wire-length. With additional costs on routing graph, the proposed maze routing-based method can be further enhanced to solve VLSI routing constraints, such as layer-specific costs, scenic control, and layer directive.

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Cited By

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  • (2024)Timing-Driven Obstacle-Avoiding X-Architecture Steiner Minimum Tree Algorithm With Slack ConstraintsIEEE Transactions on Systems, Man, and Cybernetics: Systems10.1109/TSMC.2024.335353454:5(2927-2940)Online publication date: May-2024
  • (2022)Performance-Driven X-Architecture Routing Algorithm for Artificial Intelligence Chip Design in Smart ManufacturingACM Transactions on Management Information Systems10.1145/351942213:4(1-20)Online publication date: 10-Aug-2022
  • (2022)PSO-based Power-Driven X-Routing Algorithm in semiconductor design for predictive intelligence of IoT applicationsApplied Soft Computing10.1016/j.asoc.2021.108114114:COnline publication date: 1-Jan-2022
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  1. A Maze Routing-Based Algorithm for ML-OARST with Pre-Selecting and Re-Building Steiner Points

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    cover image ACM Conferences
    GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017
    May 2017
    516 pages
    ISBN:9781450349727
    DOI:10.1145/3060403
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 10 May 2017

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    Author Tags

    1. layout
    2. physical design
    3. routing
    4. steiner tree

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    GLSVLSI '17: Great Lakes Symposium on VLSI 2017
    May 10 - 12, 2017
    Alberta, Banff, Canada

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    GLSVLSI '17 Paper Acceptance Rate 48 of 197 submissions, 24%;
    Overall Acceptance Rate 312 of 1,156 submissions, 27%

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    View all
    • (2024)Timing-Driven Obstacle-Avoiding X-Architecture Steiner Minimum Tree Algorithm With Slack ConstraintsIEEE Transactions on Systems, Man, and Cybernetics: Systems10.1109/TSMC.2024.335353454:5(2927-2940)Online publication date: May-2024
    • (2022)Performance-Driven X-Architecture Routing Algorithm for Artificial Intelligence Chip Design in Smart ManufacturingACM Transactions on Management Information Systems10.1145/351942213:4(1-20)Online publication date: 10-Aug-2022
    • (2022)PSO-based Power-Driven X-Routing Algorithm in semiconductor design for predictive intelligence of IoT applicationsApplied Soft Computing10.1016/j.asoc.2021.108114114:COnline publication date: 1-Jan-2022
    • (2020)A Survey on Steiner Tree Construction and Global Routing for VLSI DesignIEEE Access10.1109/ACCESS.2020.29861388(68593-68622)Online publication date: 2020
    • (2018)A Maze Routing-Based Methodology With Bounded Exploration and Path-Assessed Retracing for Constrained Multilayer Obstacle-Avoiding Rectilinear Steiner Tree ConstructionACM Transactions on Design Automation of Electronic Systems10.1145/317787823:4(1-26)Online publication date: 9-May-2018

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