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Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture

Published: 18 June 2017 Publication History

Abstract

The next generation video coding standard High Efficiency Video Coding (HEVC) provides better compression rate for high resolution videos, at the cost of substantially higher computational complexity. While some latest off-the-shelf consumer electronics support HEVC via ASIC solutions, software implementation of real-time HEVC remains an open challenge for resource-constraint embedded systems. In this work, we present an HEVC decoder design on a low-power embedded heterogeneous multiprocessor System-on-Chip (HMPSoC) with CPU and GPU. Our analysis shows that the massive parallel architecture of GPU leads to a relatively smooth fluctuation on the processing time between video frames. Moreover, the dynamic workload of each frame has a monotonic correlation with a particular coding parameter that can be obtained at decoding time. Based on these observations, we propose an application-specific userspace CPU-GPU DVFS scheme which effectively saves the energy consumption for HEVC decoding. Furthermore, given our accurate workload prediction, only a small frame buffer is required to ensure real-time video decoding.

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  • (2018)Application Control and Monitoring in Heterogeneous Multiprocessor Systems2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC.2018.8449379(1-8)Online publication date: Jul-2018
  • (2018)Toward Green Computing: Striking the Trade-Off between Memory Usage and Energy Consumption of Sequential Pattern Mining on GPU2018 IEEE First International Conference on Artificial Intelligence and Knowledge Engineering (AIKE)10.1109/AIKE.2018.00033(152-155)Online publication date: Sep-2018

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  1. Cooperative DVFS for energy-efficient HEVC decoding on embedded CPU-GPU architecture

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    cover image ACM Conferences
    DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017
    June 2017
    533 pages
    ISBN:9781450349277
    DOI:10.1145/3061639
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 18 June 2017

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    Author Tags

    1. DVFS
    2. HEVC
    3. heterogeneous computing
    4. power management

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    View all
    • (2020)A Taxonomy and Survey of Power Models and Power Modeling for Cloud ServersACM Computing Surveys10.1145/340620853:5(1-41)Online publication date: 28-Sep-2020
    • (2018)Application Control and Monitoring in Heterogeneous Multiprocessor Systems2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC.2018.8449379(1-8)Online publication date: Jul-2018
    • (2018)Toward Green Computing: Striking the Trade-Off between Memory Usage and Energy Consumption of Sequential Pattern Mining on GPU2018 IEEE First International Conference on Artificial Intelligence and Knowledge Engineering (AIKE)10.1109/AIKE.2018.00033(152-155)Online publication date: Sep-2018

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