research-article

Leave the Cache Hierarchy Operation as It Is: A New Persistent Memory Accelerating Approach

Authors:

Chia-Lin YangAuthors Info & Claims

DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017

Article No.: 5, Pages 1 - 6

https://doi.org/10.1145/3061639.3062272

Published: 18 June 2017 Publication History

Abstract

Persistent memory places NVRAM on the memory bus, offering fast access to persistent data. Yet maintaining NVRAM data persistence raises a host of challenges. Most proposed schemes either incur much performance overhead or require substantial modifications to existing architectures.

We propose a persistent memory accelerator design, which guarantees NVRAM data persistence by hardware yet leaving cache hierarchy and memory controller operations unaltered. A nonvolatile transaction cache keeps an alternative version of data updates side-by-side with the cache hierarchy and paves a new persistent path without affecting original processor execution path. As a result, our design achieves the performance close to the one without persistence guarantee.

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Cited By

Ye CChen MJiang QWang C(2024)Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence DomainACM Transactions on Embedded Computing Systems10.1145/360747323:6(1-34)Online publication date: 11-Sep-2024
https://dl.acm.org/doi/10.1145/3607473
Hashemi MForte DGanji F(2024)Time Is Money, Friend! Timing Side-Channel Attack Against Garbled Circuit ConstructionsApplied Cryptography and Network Security10.1007/978-3-031-54776-8_13(325-354)Online publication date: 29-Feb-2024
https://doi.org/10.1007/978-3-031-54776-8_13
Abulila AHajj IJung MKim NSalapura VZahran MChong FTang L(2022)ASAPProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527399(306-319)Online publication date: 18-Jun-2022
https://dl.acm.org/doi/10.1145/3470496.3527399
Show More Cited By

Leave the Cache Hierarchy Operation as It Is: A New Persistent Memory Accelerating Approach
1. Hardware
  1. Integrated circuits
    1. Semiconductor memory

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cover image ACM Conferences

DAC '17: Proceedings of the 54th Annual Design Automation Conference 2017

June 2017

533 pages

ISBN:9781450349277

DOI:10.1145/3061639

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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New York, NY, United States

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Published: 18 June 2017

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DAC '17: The 54th Annual Design Automation Conference 2017

June 18 - 22, 2017

TX, Austin, USA

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Ye CChen MJiang QWang C(2024)Hercules: Enabling Atomic Durability for Persistent Memory with Transient Persistence DomainACM Transactions on Embedded Computing Systems10.1145/360747323:6(1-34)Online publication date: 11-Sep-2024
https://dl.acm.org/doi/10.1145/3607473
Hashemi MForte DGanji F(2024)Time Is Money, Friend! Timing Side-Channel Attack Against Garbled Circuit ConstructionsApplied Cryptography and Network Security10.1007/978-3-031-54776-8_13(325-354)Online publication date: 29-Feb-2024
https://doi.org/10.1007/978-3-031-54776-8_13
Abulila AHajj IJung MKim NSalapura VZahran MChong FTang L(2022)ASAPProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527399(306-319)Online publication date: 18-Jun-2022
https://dl.acm.org/doi/10.1145/3470496.3527399
Dong NCheng HYang CLin BLi H(2022)Efficient and Atomic-Durable Persistent Memory through In-PM Hybrid Logging2022 IEEE 11th Non-Volatile Memory Systems and Applications Symposium (NVMSA)10.1109/NVMSA56066.2022.00010(1-7)Online publication date: Aug-2022
https://doi.org/10.1109/NVMSA56066.2022.00010
Lee HKim HShim SLee SHong DLee HKim H(2022)PCMCsim: An Accurate Phase-Change Memory Controller Simulator and its Performance Analysis2022 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)10.1109/ISPASS55109.2022.00043(300-310)Online publication date: May-2022
https://doi.org/10.1109/ISPASS55109.2022.00043
Tang KTong WMa JLiu B(2019)DV-NVLLC: Efficiently guaranteeing crash consistency in persistent memory via dynamic versioning2019 IEEE International Conference on Networking, Architecture and Storage (NAS)10.1109/NAS.2019.8834719(1-8)Online publication date: Aug-2019
https://doi.org/10.1109/NAS.2019.8834719
Wei XFeng DTong WLiu JYe L(2018)NICO: Reducing Software-Transparent Crash Consistency Cost for Persistent MemoryIEEE Transactions on Computers10.1109/TC.2018.2876829(1-1)Online publication date: 2018
https://doi.org/10.1109/TC.2018.2876829
Kotra JZhang HAlameldeen AWilkerson CKandemir MOskin MInoue K(2018)CHAMELEONProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00050(533-545)Online publication date: 20-Oct-2018
https://dl.acm.org/doi/10.1109/MICRO.2018.00050
Nguyen TWentzlaff DOskin MInoue K(2018)PiCLProceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture10.1109/MICRO.2018.00048(507-519)Online publication date: 20-Oct-2018
https://dl.acm.org/doi/10.1109/MICRO.2018.00048
Ogleari MMiller EZhao J(2018)Steal but No Force: Efficient Hardware Undo+Redo Logging for Persistent Memory Systems2018 IEEE International Symposium on High Performance Computer Architecture (HPCA)10.1109/HPCA.2018.00037(336-349)Online publication date: Feb-2018
https://doi.org/10.1109/HPCA.2018.00037

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