Proceedings of the conference on Design, automation and test in Europe

DATE '99: Proceedings of the conference on Design, automation and test in Europe

January 1999

1999 Proceeding

Publisher:

Association for Computing Machinery
New York
NY
United States

Conference:

DATE99: Design Automation and Test in Europe Conference and Exhibition 1999 Munich Germany

ISBN:

978-1-58113-121-5

Published:

01 January 1999

Sponsors:

SIGDA

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Citation count

1,468

Downloads (6 weeks)

408

Downloads (12 months)

2,492

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25,850

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DATE '99: Proceedings of the conference on Design, automation and test in Europe

1999

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Higher product complexity and shorter development time—continuous challenge to design and test environment

Jouko Junkkari

pp 1–eshttps://doi.org/10.1145/307418.307423

- 3
- 133
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Total Citations3
Total Downloads133
Last 12 Months1
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Automotive electronics—a challenge for systems engineering

Peter Thoma

pp 2–eshttps://doi.org/10.1145/307418.307425

- 2
- 174
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Total Citations2
Total Downloads174
Last 12 Months4
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Testing in nanometer technologies

T. W. Williams

pp 3–eshttps://doi.org/10.1145/307418.307426

- 1
- 101
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Total Citations1
Total Downloads101
Last 12 Months3
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Computing timed transition relations for sequential cycle-based simulation

Gianpiero Cabodi,
Paolo Camurati,
Claudio Passerone,
Stefano Quer

pp 4–eshttps://doi.org/10.1145/307418.307427

- 0
- 91
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Total Citations0
Total Downloads91
Last 12 Months8
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Symbolic reachability analysis of large finite state machines using don't cares

Youpyo Hong,
Peter A. Beerel

pp 5–eshttps://doi.org/10.1145/307418.307430

- 0
- 138
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Total Citations0
Total Downloads138
Last 12 Months13
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Approximate equivalence verification of sequential circuits via genetic algorithms

F. Corno,
M. Sonza Reorda,
G. Squillero

pp 6–eshttps://doi.org/10.1145/307418.307431

- 1
- 97
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Total Citations1
Total Downloads97
Last 12 Months3
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FSMD functional partitioning for low power

Enoch Hwang,
Frank Vahid,
Yu-Chin Hsu

pp 7–eshttps://doi.org/10.1145/307418.307432

- 11
- 216
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Total Citations11
Total Downloads216
Last 12 Months11
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A new parameterizable power macro-model for datapath components

Gerd Jochens,
Lars Kruse,
Eike Schmidt,
Wolfgang Nebel

pp 8–eshttps://doi.org/10.1145/307418.307434

- 15
- 169
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Total Citations15
Total Downloads169
Last 12 Months12
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An efficient reuse system for digital circuit design

Annette Reutter,
Wolfgang Rosenstiel

pp 9–eshttps://doi.org/10.1145/307418.307444

- 8
- 212
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Total Citations8
Total Downloads212
Last 12 Months51
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An MPEG-2 video encoder LSI with scalability for HDTV based on three-layer cooperative architecture

Mitsuo Ikeda,
Toshio Kondo,
Koyo Nitta,
Kazuhito Suguri,
Takeshi Yoshitome,
Toshihiro Minami,
Jiro Naganuma,
Takeshi Ogura

pp 10–eshttps://doi.org/10.1145/307418.307445

- 7
- 258
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Total Citations7
Total Downloads258
Last 12 Months26
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Formal verification of word-level specifications

Stefan Höreth,
Rolf Drechsler

pp 11–eshttps://doi.org/10.1145/307418.307447

- 11
- 210
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Total Citations11
Total Downloads210
Last 12 Months41
Last 6 weeks10

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Automatic verification of scheduling results in high-level synthesis

Hans Eveking,
Holger Hinrichsen,
Gerd Ritter

pp 12–eshttps://doi.org/10.1145/307418.307449

- 16
- 152
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Total Citations16
Total Downloads152
Last 12 Months20
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Verifying imprecisely working arithmetic circuits

M. Huhn,
K. Schneider,
Th. Kropf,
G. Logothetis

pp 13–eshttps://doi.org/10.1145/307418.307451

- 3
- 140
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Total Citations3
Total Downloads140
Last 12 Months15
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Interval diagram techniques for symbolic model checking of Petri nets

Karsten Strehl,
Lothar Thiele

pp 14–eshttps://doi.org/10.1145/307418.307452

- 9
- 178
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Total Citations9
Total Downloads178
Last 12 Months27
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Variable reordering for shared binary decision diagrams using output probabilities

M. A. Thornton,
J. P. Williams,
R. Drechsler,
N. Drechsler

pp 15–eshttps://doi.org/10.1145/307418.307453

- 0
- 127
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Total Citations0
Total Downloads127
Last 12 Months16
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Increasing efficiency of symbolic model checking by accelerating dynamic variable reordering

Christoph Meinel,
Christian Stangier

pp 16–eshttps://doi.org/10.1145/307418.307454

- 1
- 96
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Total Citations1
Total Downloads96
Last 12 Months7
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Battery-powered digital CMOS design

Massoud Pedram,
Qing Wu

pp 17–eshttps://doi.org/10.1145/307418.307455

- 13
- 261
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Total Citations13
Total Downloads261
Last 12 Months44
Last 6 weeks7

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Dynamic power management for non-stationary service requests

Eui-Young Chung,
Luca Benini,
Alessandro Bogiolo,
Giovanni De Micheli

pp 18–eshttps://doi.org/10.1145/307418.307456

- 66
- 307
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Total Citations66
Total Downloads307
Last 12 Months50
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On reducing transitions through data modifications

Rajeev Murgai,
Masahiro Fujita

pp 19–eshttps://doi.org/10.1145/307418.307457

- 3
- 96
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Total Citations3
Total Downloads96
Last 12 Months11
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Influence of caching and encoding on power dissipation of system-level buses for embedded systems

William Fornaciari,
Donatella Sciuto,
Christina Silvano

pp 20–eshttps://doi.org/10.1145/307418.307458

- 0
- 82
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Total Citations0
Total Downloads82
Last 12 Months6
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Kernel scheduling in reconfigurable computing

R. Maestre,
F. J. Kurdahi,
N. Bagherzadeh,
H. Singh,
R. Hermida,
M. Fernandez

pp 21–eshttps://doi.org/10.1145/307418.307460

- 22
- 260
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Total Citations22
Total Downloads260
Last 12 Months15
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CRUSADE: hardware/software co-synthesis of dynamically reconfigurable heterogeneous real-time distributed embedded systems

Bharat P. Dave

pp 22–eshttps://doi.org/10.1145/307418.307461

- 16
- 316
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Total Citations16
Total Downloads316
Last 12 Months30
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Exploiting conditional instructions in code generation for embedded VLIW processors

Rainer Leupers

pp 23–eshttps://doi.org/10.1145/307418.307462

- 7
- 165
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Total Citations7
Total Downloads165
Last 12 Months15
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Emulation of a fast reactive embedded system using a real time operating system

Karlheinz Weiß,
Thorsten Steckstor,
Wolfgang Rosenstiel

pp 24–eshttps://doi.org/10.1145/307418.307463

- 0
- 208
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Total Citations0
Total Downloads208
Last 12 Months11
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The heterogeneous structure problem in hardware/software codesign: a macroscopic approach

J. A. Maestro,
D. Mozos,
R. Hermida

pp 25–eshttps://doi.org/10.1145/307418.307464

- 1
- 103
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Total Citations1
Total Downloads103
Last 12 Months6
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Codesign of embedded systems based on Java and reconfigurable hardware components

Josef Fleischmann,
Klaus Buchenrieder,
Rainer Kress

pp 26–eshttps://doi.org/10.1145/307418.307466

- 8
- 214
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Total Citations8
Total Downloads214
Last 12 Months19
Last 6 weeks3

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Path delay fault testing of ICs with embedded intellectual property blocks

D. Nikolos,
Th. Haniotakis,
H. T. Vergos,
Y. Tsiatouhas

pp 27–eshttps://doi.org/10.1145/307418.307468

- 3
- 127
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Total Citations3
Total Downloads127
Last 12 Months18
Last 6 weeks6

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An effective BIST architecture for fast multiplier cores

A. Paschalis,
D. Gizopoulos,
N. Kranitis,
M. Psarakis,
Y. Zorian

pp 28–eshttps://doi.org/10.1145/307418.307469

- 11
- 204
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Total Citations11
Total Downloads204
Last 12 Months17
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A CAD framework for generating self-checking multipliers based on residue codes

I. Alzaher Noufal,
M. Nicolaidis

pp 29–eshttps://doi.org/10.1145/307418.307471

- 9
- 273
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Total Citations9
Total Downloads273
Last 12 Months30
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ADOLT - an adaptable online testing scheme for VLSI circuits

A. Maamar,
G. Russell

pp 30–eshttps://doi.org/10.1145/307418.307473

- 0
- 112
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Total Downloads112
Last 12 Months14
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Index Terms

Proceedings of the conference on Design, automation and test in Europe
1. Hardware
  1. Integrated circuits
    1. Logic circuits
  2. Robustness

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Acceptance Rates

Overall Acceptance Rate518of1,794submissions,29%

Year	Submitted	Accepted	Rate
DATE '15	915	206	23%
DATE '06	45	45	100%
DATE '06	834	267	32%
Overall	1,794	518	29%

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