ABSTRACT
The memory subsystem is a major contributor to the overall performance and energy consumption of embedded computing platforms. The emergence of "killer" applications such as data-intensive recognition, mining, and synthesis (RMS) applications puts even more stress on the memory subsystem and exacerbates its energy consumption. Traditional mechanisms to ensure data integrity deploy overdesign (e.g., redundancy and error detection/correction) and/or guard-banding that consumes a significant part of the energy consumed in the memory subsystem. We explore opportunities for energy efficiency by exploiting the intrinsic tolerance of a vast class of approximate computing applications to some level of error in the on-chip memory hierarchy. We present two exemplars outlining the typical software and hardware mechanisms that are required for different components in the memory hierarchy, implemented in varying technologies such as SRAM and STT-MRAM.
- A. M. Monazzah et al. 2017. QuARK: Quality-configurable Approximate STT-MRAM Cache by Fine-grained Tuning of Reliability-Energy Knobs. In Proc. of ISLPED. Google ScholarCross Ref
- A. Ranjan et al. 2015. Approximate Storage for Energy Efficient Spintronic Memories. In Proc. of DAC. Google ScholarDigital Library
- A. Raha et al. 2017. Quality Configurable Approximate DRAM. IEEE Trans. Comput. (2017).Google Scholar
- A. Sampson et al. 2013. Approximate Storage in Solid-state Memories. In Proc. of MICRO. Google ScholarDigital Library
- B. Thwaites et al. 2014. Rollback-free Value Prediction with Approximate Loads. In Proc. of PACT. Google ScholarDigital Library
- D. Jevdjic et al. 2017. Approximate Storage of Compressed and Encrypted Videos. In Proc. of ASPLOS. Google ScholarDigital Library
- F. Sampaio et al. 2015. Approximation-aware Multi-Level Cells STT-RAM Cache Architecture. In Proc. of CASES. Google ScholarCross Ref
- G. P. Arumugam et al. 2015. Novel Inexact Memory Aware Algorithm Co-design for Energy Efficient Computation: Algorithmic Principles. In DATE.Google Scholar
- K. Cho et al. 2014. eDRAM-based Tiered-Reliability Memory with Applications to Low-power Frame Buffers. In Proc. of ISLPED. Google ScholarDigital Library
- K. Lee et al. 2006. Mitigating Soft Error Failures for Multimedia Applications by Selective Data Protection. In Proc. of CASES. Google ScholarDigital Library
- M. Shoushtari et al. 2015. Exploiting Partially-Forgetful Memories for Approximate Computing. IEEE Embedded Systems Letters (2015).Google Scholar
- N. Dutt et al. 2014. Multi-Layer Memory Resiliency. In Proc. of DAC. Google ScholarDigital Library
- O. Kislal et al. 2016. Cache-Aware Approximate Computing for Decision Tree Learning. In Proc. of IPDPSW. Google ScholarCross Ref
- Q. Guo et al. 2016. High-Density Image Storage Using Approximate Memory Cells. In Proc. of ASPLOS. Google ScholarDigital Library
- S. Ganapathy et al. 2015. Mitigating the Impact of Faults in Unreliable Memories for Error-resilient Applications. In Proc. of DAC. Google ScholarDigital Library
- S. Liu et al. 2011. Flikker: Saving DRAM Refresh-power Through Critical Data Partitioning. In Proc. of ASPLOS. Google ScholarDigital Library
- Y. Fang et al. 2012. SoftPCM: Enhancing Energy Efficiency and Lifetime of Phase Change Memory in Video Applications via Approximate Write. In Proc. of ATS. Google ScholarDigital Library
- Y. Tian et al. 2015. ApproxMA: Approximate Memory Access for Dynamic Precision Scaling. In Proc. of GLSVLSI. Google ScholarDigital Library
- J. S. Miguel et l. 2014. Load Value Approximation. In IEEE/ACM International Symposium on Microarchitecture.Google Scholar
- J. S. Miguel et l. 2015. DoppelgÄNger: A Cache for Approximate Computing. In Proc. of MICRO.Google Scholar
- J. S. Miguel et l. 2016. The Bunker Cache for Spatio-value Approximation. In Proc. of MICRO.Google Scholar
- F. Oboril, A. Shirvanian, and M. Tahoori. 2016. Fault Tolerant Approximate Computing using Emerging Non-volatile Spintronic Memories. In Proc. of VTS. Google ScholarCross Ref
- Martin Rinard. 2013. Parallel Synchronization-Free Approximate Data Structure Construction. In 5th USENIX Workshop on Hot Topics in Parallelism.Google Scholar
- Majid Shoushtari and Nikil Dutt. 2017. A Survey of Techniques for Approximate Memory Management. Technical Report CECS-TR-17--03. Center for Embedded and Cyber-physical Systems, University of California, Irvine.Google Scholar
- X. Xu and H. H. Huang. 2015. Exploring Data-Level Error Tolerance in High-Performance Solid-State Drives. IEEE Transactions on Reliability (2015).Google Scholar
- Quality-configurable memory hierarchy through approximation: special session
Recommendations
3D DRAM and PCMs in Processor Memory Hierarchy
Proceedings of the 27th International Conference on Architecture of Computing Systems ARCS 2014 - Volume 8350In this paper we describe and evaluate two possible architectures using 3D DRAMs and PCMs in the processor memory hierarchy. We explore using (a) 3D DRAM as main memory with PCM as backing store and (b) 3D DRAM as the Last Level Cache and PCM as the ...
Memory organizations for 3D-DRAMs and PCMs in processor memory hierarchy
In this paper, we describe and evaluate three possible architectures for using 3D-DRAMs and PCMs in the processor memory hierarchy. We explore: (i) using 3D-DRAM as main memory with PCM as backing store; (ii) using 3D-DRAM as the Last Level Cache and ...
An integrated memory-disk system with buffering adapter and non-volatile memory
Next generation non-volatile memory devices are promising replacements for DRAM and Flash memories for mobile devices because of their energy efficiency and non-volatile characteristics. In this paper, we propose a new memory hierarchy system for next-...
Comments