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Edge-TM: Exploiting Transactional Memory for Error Tolerance and Energy Efficiency

Authors:

Dimitra Papagiannopoulou,

Andrea Marongiu,

Maurice Herlihy,

R. Iris BaharAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 16, Issue 5s

Article No.: 153, Pages 1 - 18

https://doi.org/10.1145/3126556

Published: 27 September 2017 Publication History

Abstract

Scaling of semiconductor devices has enabled higher levels of integration and performance improvements at the price of making devices more susceptible to the effects of static and dynamic variability. Adding safety margins (guardbands) on the operating frequency or supply voltage prevents timing errors, but has a negative impact on performance and energy consumption. We propose Edge-TM, an adaptive hardware/software error management policy that (i) optimistically scales the voltage beyond the edge of safe operation for better energy savings and (ii) works in combination with a Hardware Transactional Memory (HTM)-based error recovery mechanism. The policy applies dynamic voltage scaling (DVS) (while keeping frequency fixed) based on the feedback provided by HTM, which makes it simple and generally applicable. Experiments on an embedded platform show our technique capable of 57% energy improvement compared to using voltage guardbands and an extra 21-24% improvement over existing state-of-the-art error tolerance solutions, at a nominal area and time overhead.

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Cited By

Wook Stephen Do SDubois M(2020)Transaction-Based Core Reliability2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS47924.2020.00027(168-179)Online publication date: May-2020
https://doi.org/10.1109/IPDPS47924.2020.00027
Papagiannopoulou DWhang SMoreshet TBahar R(2019)IgnoreTM: Opportunistically Ignoring Timing Violations for Energy Savings using HTM2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8715139(1571-1574)Online publication date: Mar-2019
https://doi.org/10.23919/DATE.2019.8715139
Bahar RKarpuzcu UMisailovic S(2019)Special Session: Does Approximation Make Testing Harder (or Easier)?2019 IEEE 37th VLSI Test Symposium (VTS)10.1109/VTS.2019.8758649(1-9)Online publication date: Apr-2019
https://doi.org/10.1109/VTS.2019.8758649
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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 16, Issue 5s

Special Issue ESWEEK 2017, CASES 2017, CODES + ISSS 2017 and EMSOFT 2017

October 2017

1448 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/3145508

Editor:
Sandeep K. Shukla
Indian Institute of Technology, India

Issue’s Table of Contents

Copyright © 2017 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 27 September 2017

Accepted: 01 July 2017

Revised: 01 May 2017

Received: 01 March 2017

Published in TECS Volume 16, Issue 5s

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Cited By

Wook Stephen Do SDubois M(2020)Transaction-Based Core Reliability2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS47924.2020.00027(168-179)Online publication date: May-2020
https://doi.org/10.1109/IPDPS47924.2020.00027
Papagiannopoulou DWhang SMoreshet TBahar R(2019)IgnoreTM: Opportunistically Ignoring Timing Violations for Energy Savings using HTM2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8715139(1571-1574)Online publication date: Mar-2019
https://doi.org/10.23919/DATE.2019.8715139
Bahar RKarpuzcu UMisailovic S(2019)Special Session: Does Approximation Make Testing Harder (or Easier)?2019 IEEE 37th VLSI Test Symposium (VTS)10.1109/VTS.2019.8758649(1-9)Online publication date: Apr-2019
https://doi.org/10.1109/VTS.2019.8758649
Alioto MDe VMarongiu A(2018)Energy-Quality Scalable Integrated Circuits and Systems: Continuing Energy Scaling in the Twilight of Moore’s LawIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2018.28814618:4(653-678)Online publication date: Dec-2018
https://doi.org/10.1109/JETCAS.2018.2881461
Whang SRachford TPapagiannopoulou DMoreshet TBahar R(2017)Evaluating critical bits in arithmetic operations due to timing violations2017 IEEE High Performance Extreme Computing Conference (HPEC)10.1109/HPEC.2017.8091090(1-7)Online publication date: Sep-2017
https://doi.org/10.1109/HPEC.2017.8091090

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