MICRO

Virtual Channels (VCs) are a fundamental design feature across networks, both on-chip and off-chip. They provide two key benefits - deadlock avoidance and head-of-line (HoL) blocking mitigation. However, VCs increase the router critical path, and add ...

Error injection has become critically important for testing the reliability of the hardware of any system. Measuring how a design under test reacts to different error injection methodologies is very essential for verification engineers to design ...

On-chip wireless interconnects have been proposed to provide energy-efficient data communication paths between cores in System-on-Chips (SoCs) in the multi and many-core era. Networks-on-Chips (NoCs) when interconnecting hundreds of cores consume large ...

In this paper, we present a new self-routing and non-blocking uni-cast interconnection network based on binary radix sorting that is more efficient than comparable other interconnection networks. To substantiate this claim, we first derive the ...

Hybrid photonic-electronic networks-on-chip (HPENoCs) harness the strengths of both photonic and electronic links to meet the stringent demands of bandwidth, power, and latency of many-core systems. Microring resonators (MRRs), fundamental components in ...

Three-dimensional Network-on-Chip (3D NoC), the combination of NoC and 3D IC technology, can achieve lower latency, lower power consumption, and higher data bandwidth for efficient intra/inter-chip data exchange of chip multiprocessors (CMPs). Due to ...

The advances on 3D circuit integration have reignited the idea of processing-in-memory (PIM). In this paper, we evaluate 3D mesh-based NoC design for 3D-PIM systems. We study the stacked mesh (S-Mesh) which is a mesh-bus hybrid architecture for 3D NoCs ...

In Mixed-Criticality Systems (MCS), high-critical real-time and low-critical real-time applications share the same hardware platform. Today MCS must also be implementable on NoC-based architectures. Those applications exchange messages with different ...

Because of the stacking dies and heterogeneous thermal conduction, the three dimensional Network-on-Chip (3D NoC) suffers from more serious thermal problem. The thermal issue limits the performance gain of 3D integration and results in lower reliability ...

The Kalray MPPA2-256 Bostan processor network-on-chip (NoC) implements wormhole switching without virtual channels and with source routing. As shown in earlier work, this NoC can be configured for guaranteed services by solving a set of linear ...