skip to main content
10.1145/3148173.3148191acmconferencesArticle/Chapter ViewAbstractPublication PagesscConference Proceedingsconference-collections
research-article

LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization

Published: 12 November 2017 Publication History

Abstract

With advances of modern multi-core processors and accelerators, many modern applications are increasingly turning to compiler-assisted parallel and vector programming models such as OpenMP, OpenCL, Halide, Python and TensorFlow. It is crucial to ensure that LLVM-based compilers can optimize parallel and vector code as effectively as possible. In this paper, we first present a set of updated LLVM IR extensions for explicitly parallel, vector, and offloading program constructs in the context of C/C++/OpenCL. Secondly, we describe our LLVM design and implementation for advanced features in OpenMP such as parallel loop reduction, task and taskloop, SIMD loop and functions, and we discuss the impact of our updated implementation on existing LLVM optimization passes. Finally, we present a re-use case of our infrastructure to enable explicit parallelization and vectorization extensions in our OpenCL compiler to achieve ~35x performance speedup for a well-known autonomous driving workload on a multi-core platform configured with Intel® Xeon® Scalable Processors.

References

[1]
C. Lattner and V. Adve. LLVM: A compilation framework for lifelong program analysis & transformation. In CGO '04, pages 75--86, 2004.
[2]
X. Tian, M. Girkar, A. J.C. Bik, and H. Saito, "Practical Compiler Techniques on Efficient Multithreaded Code Generation for OpenMP Programs," The Computer Journal, Oxford, Vol. 48, Issue 5, pps. 558--601, 2005.
[3]
X. Tian, H. Saito, M. Girkar, S. Preis, S. Kozhukhov, A.G. Cherkasov, C. Nelson, N. Panchenko, R. Geva, Compiling C/C++ SIMD Extensions for Function and Loop Vectorization on Multicore-SIMD Processors. In Proc. of IEEE 26th International Parallel and Distributed Processing Symposium - Multicore and GPU Prog. Models, Lang. and Compilers Workshop, pp. 2349--2358, 2012.
[4]
OpenMP Architecture Review Board, "OpenMP Application Program Interface," v4.5, Oct. 2015, http://www.openmp.org
[5]
J. Zhao, S. Nagarakatte, M. M. Martin, and S. Zdancewic. Formalizing the LLVM intermediate representation for verified program transformations. In POPL '12, pages 427--440, 2012.
[6]
Intel Corporation, LLVM Intrinsic function and Tag name string interface specitication for directive representation, April 12, 2017
[7]
A. Zaks, et.al., "[llvm-dev] RFC: Extending LV to vectorize outerloops", Sept. 21, 2016, Intel Corporation.
[8]
H. Finkel and X. Tian "[llvm-dev] RPC: A Proposal for adding an experimental IR-level region-annotation infrastructure, Jan. 11, 2017. http://lists.llvm.org/pipermail/llvm-dev/2017-January/108906.html.
[9]
H. Saito, et. al., "Extending LoopVectorizer towards supporting OpenMP4.5 SIMD and outer loop auto-vectorization", LLVM Developer's Conference, Nov. 2016
[10]
X. Tian, et.al. "Proposal for function vectorization and loop vectorization with function calls", March 2, 2016. Intel Corp. http://lists.llvm.org/pipermail/cfe-dev/2016-March/047732.html.
[11]
F. Homm, N. Kaempchen, J. Ota and D. Burschka, "Efficient Occupancy Grid Computation on GPU with Lidar and Radar for Road Boundary Detection", In Proc. of IEEE Intelligent Vehicle Symposium, pp. 1006--1013 Universiry of California, San Diego, CA, USA, June 21-24, 2010.
[12]
X. Tian, H. Saito, E. Su, A. Gaba, M. Masten, E. Garcia, A. Zaks, "LLVM Framework and IR Extensions for Parallelization, SIMD Vectorization and Offloading". LLVM-HPC@SC 2016: 21--31.
[13]
T.B. Schardl, W.S. Moses, C.E. Leiserson, "Tapir: Embedding Fork-Join Parallelism into LLVM's Intermediate Representation", PPoPP'17, Feburary. 4-7, 2017, Austin, Texas, USA.

Cited By

View all
  • (2024)Towards Smart Contract Fuzzing on GPUs2024 IEEE Symposium on Security and Privacy (SP)10.1109/SP54263.2024.00229(2255-2272)Online publication date: 19-May-2024
  • (2024)Leveraging MLIR for Loop Vectorization and GPU Porting of FFT LibrariesEuro-Par 2023: Parallel Processing Workshops10.1007/978-3-031-50684-0_16(207-218)Online publication date: 16-Apr-2024
  • (2023)Enhancing LLVM Optimizations for Linear Recurrence Programs on RVVProceedings of the 52nd International Conference on Parallel Processing Workshops10.1145/3605731.3605904(79-87)Online publication date: 7-Aug-2023
  • Show More Cited By
  1. LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    LLVM-HPC'17: Proceedings of the Fourth Workshop on the LLVM Compiler Infrastructure in HPC
    November 2017
    106 pages
    ISBN:9781450355650
    DOI:10.1145/3148173
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 12 November 2017

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. LLVM
    2. Multi- and many-core processors
    3. OpenMP
    4. accelerators
    5. offloading
    6. parallelization
    7. vectorization

    Qualifiers

    • Research-article
    • Research
    • Refereed limited

    Conference

    SC '17
    Sponsor:

    Acceptance Rates

    LLVM-HPC'17 Paper Acceptance Rate 9 of 10 submissions, 90%;
    Overall Acceptance Rate 16 of 22 submissions, 73%

    Upcoming Conference

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)114
    • Downloads (Last 6 weeks)3
    Reflects downloads up to 05 Mar 2025

    Other Metrics

    Citations

    Cited By

    View all
    • (2024)Towards Smart Contract Fuzzing on GPUs2024 IEEE Symposium on Security and Privacy (SP)10.1109/SP54263.2024.00229(2255-2272)Online publication date: 19-May-2024
    • (2024)Leveraging MLIR for Loop Vectorization and GPU Porting of FFT LibrariesEuro-Par 2023: Parallel Processing Workshops10.1007/978-3-031-50684-0_16(207-218)Online publication date: 16-Apr-2024
    • (2023)Enhancing LLVM Optimizations for Linear Recurrence Programs on RVVProceedings of the 52nd International Conference on Parallel Processing Workshops10.1145/3605731.3605904(79-87)Online publication date: 7-Aug-2023
    • (2023)Streamline Ahead-of-Time SYCL CPU Device Implementation through Bypassing SPIR-VProceedings of the 2023 International Workshop on OpenCL10.1145/3585341.3585381(1-1)Online publication date: 18-Apr-2023
    • (2023)High-Performance GPU-to-CPU Transpilation and Optimization via High-Level Parallel ConstructsProceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3572848.3577475(119-134)Online publication date: 25-Feb-2023
    • (2023)mlirSynth: Automatic, Retargetable Program Raising in Multi-Level IR using Program SynthesisProceedings of the 32nd International Conference on Parallel Architectures and Compilation Techniques10.1109/PACT58117.2023.00012(39-50)Online publication date: 21-Oct-2023
    • (2022)To PIM or not for emerging general purpose processing in DDR memory systemsProceedings of the 49th Annual International Symposium on Computer Architecture10.1145/3470496.3527431(231-244)Online publication date: 18-Jun-2022
    • (2022)Co-Designing an OpenMP GPU Runtime and Optimizations for Near-Zero Overhead Execution2022 IEEE International Parallel and Distributed Processing Symposium (IPDPS)10.1109/IPDPS53621.2022.00055(504-514)Online publication date: May-2022
    • (2022)Efficient execution of OpenMP on GPUsProceedings of the 20th IEEE/ACM International Symposium on Code Generation and Optimization10.1109/CGO53902.2022.9741290(41-52)Online publication date: 2-Apr-2022
    • (2021)Paths to OpenMP in the kernelProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3458817.3476183(1-17)Online publication date: 14-Nov-2021
    • Show More Cited By

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media