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Eh?Legalizer: A High Performance Standard-Cell Legalizer Observing Technology Constraints

Published:09 May 2018Publication History
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Abstract

The legalization step is performed after global placement where wire length and routability are optimized or during timing optimization where buffer insertion or gate sizing are applied to meet timing requirements. Therefore, an ideal legalization approach must preserve the quality of the input placement in terms of routability, wire length, and timing constraints. These requirements indirectly impose maximum and average cell movement constraints during legalization. In addition, the legalization step should effectively manage white space availability with a highly efficient runtime in order to be used in an iterative process such as timing optimization. In this article, a robust and fast legalization method called Eh?Legalizer for standard-cell placement is presented. Eh?Legalizer legalizes input placements while minimizing the maximum and average cell movements using a highly efficient novel network flow-based approach. In contrast to the traditional network flow-based legalizers, areas with high cell utilizations are effectively legalized by finding several candidate paths and there is no need for a post-process step. The experimental results conducted on several benchmarks show that Eh?Legalizer results in 2.5 times and 3.3 times less the maximum and average cell movement, respectively, while its runtime is significantly (18×) lower compared to traditional legalizers. In addition, the experimental results illustrate the scalability and robustness of Eh?Legalizer with respect to the floorplan complexity. Finally, the detailed-routing results show detailed-routing violations are reduced on average by 23% when Eh?Legalizer is used to generate legal solutions.

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          cover image ACM Transactions on Design Automation of Electronic Systems
          ACM Transactions on Design Automation of Electronic Systems  Volume 23, Issue 4
          Special Section on Advances in Physical Design Automation and Regular Papers
          July 2018
          316 pages
          ISSN:1084-4309
          EISSN:1557-7309
          DOI:10.1145/3217208
          • Editor:
          • Naehyuck Chang
          Issue’s Table of Contents

          Copyright © 2018 ACM

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          Publication History

          • Published: 9 May 2018
          • Accepted: 1 October 2017
          • Revised: 1 August 2017
          • Received: 1 May 2017
          Published in todaes Volume 23, Issue 4

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