Cited By
View all- Reif SSchröder-Preikschat W(2018)A predictable synchronisation algorithmACM SIGPLAN Notices10.1145/3200691.317853353:1(415-416)Online publication date: 10-Feb-2018
A predictable synchronisation algorithm
Pages 415 - 416
Abstract
Interaction with physical objects often imposes latency requirements to multi-core embedded systems. One consequence is the need for synchronisation algorithms that provide predictable latency, in addition to high throughput. We present a synchronisation algorithm that needs at most 7 atomic memory operations per asynchronous critical section. The performance is competitive, at least, to locks.
References
[1]
G. Drescher and W. Schröder-Preikschat. 2015. Guarded Sections: Structuring Aid for Wait-Free Synchronisation. In IEEE ISORC '15. 280--283.
[2]
J.-P. Lozi, F. David, G. Thomas, J. Lawall, and G. Muller. 2012. Remote Core Locking: Migrating Critical-Section Execution to Improve the Performance of Multithreaded Applications. In USENIX ATC '12. 65--76.
[3]
S. Reif, T. Hönig, and W. Schröder-Preikschat. 2017. In the Heat of Conflict: On the Synchronisation of Critical Sections. In IEEE ISORC '17. 42--51.
[4]
S. Reif and W. Schröder-Preikschat. 2017. Predictable Synchronisation Algorithms for Asynchronous Critical Sections. Technical Report.
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February 2018
442 pages
January 2018426 pages
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Publication History
Published: 10 February 2018
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- Poster
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- German Research Foundation (DFG)
- Transregional Collaborative Research Centre
Conference
PPoPP '18: 23nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
February 24 - 28, 2018
Vienna, Austria
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Overall Acceptance Rate 230 of 1,014 submissions, 23%
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View all- Reif SSchröder-Preikschat W(2018)A predictable synchronisation algorithmACM SIGPLAN Notices10.1145/3200691.317853353:1(415-416)Online publication date: 10-Feb-2018
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