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An Integration Flow for Mixed-Critical Embedded Systems on a Flexible Time-Triggered Platform

Published: 09 May 2018 Publication History

Abstract

The rise of mixed-critical embedded systems imposes novel challenges on the specification, development, and functional validation in a design flow. In the emerging dynamic scheduling context of mixed-criticality platforms, the system behaviour needs to be estimated in an early step in the design flow to assess the integration impact, especially for quality of service-driven, low-critical subsystems. We provide a modelling and integration flow for specifying, estimating, and evaluating software functions, ranging from an initial executable specification to an implementation candidate on an MPSoC. Based on a data-driven model to evaluate dynamic resource consumption effects of high-critical subsystems and the scheduling overhead, we propose a systematic method for constructing workload models of high-critical software components on the target. Our proxies provide an integration environment for low-critical functions by mimicking the high-critical temporal behaviour on the target. By integrating a low-critical video encoding subsystem with a benchmark suite as the high-critical subsystem we show that the performance model allows for evaluating end-to-end execution times in the low-critical function with an average error of 0.37% and the application proxy only introduces a maximum error of 1.14% in a performance evaluation.

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  • (2023)A RISC-V based platform supporting mixed timing-critical and high performance workloads2023 26th Euromicro Conference on Digital System Design (DSD)10.1109/DSD60849.2023.00094(650-659)Online publication date: 6-Sep-2023
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Published In

cover image ACM Transactions on Design Automation of Electronic Systems
ACM Transactions on Design Automation of Electronic Systems  Volume 23, Issue 4
Special Section on Advances in Physical Design Automation and Regular Papers
July 2018
316 pages
ISSN:1084-4309
EISSN:1557-7309
DOI:10.1145/3217208
  • Editor:
  • Naehyuck Chang
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Publication History

Published: 09 May 2018
Accepted: 01 February 2018
Revised: 01 February 2018
Received: 01 September 2017
Published in TODAES Volume 23, Issue 4

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Author Tags

  1. Mixed criticality
  2. design flow
  3. integration
  4. performance modelling
  5. real-time systems

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  • Refereed

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  • German Bundesministerium für Bildung und Forschung (BMBF)
  • ARTEMIS EMC2 collaborative

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  • (2023)A RISC-V based platform supporting mixed timing-critical and high performance workloads2023 26th Euromicro Conference on Digital System Design (DSD)10.1109/DSD60849.2023.00094(650-659)Online publication date: 6-Sep-2023
  • (2020)Bank customer loyalty under the background of internet finance and multimedia technologyJournal of Intelligent & Fuzzy Systems10.3233/JIFS-189420(1-11)Online publication date: 14-Oct-2020
  • (2019)HW/SW Co-Design Framework for Mixed-Criticality Embedded Systems Considering Xtratum-Based SW Partitions2019 22nd Euromicro Conference on Digital System Design (DSD)10.1109/DSD.2019.00085(554-561)Online publication date: Aug-2019

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