skip to main content
10.1145/3194554.3194571acmconferencesArticle/Chapter ViewAbstractPublication PagesglsvlsiConference Proceedingsconference-collections
research-article

Loss is Gain: Shortening Data for Lifetime Improvement on Low-Cost ECC Enabled Consumer-Level Flash Memory

Published: 30 May 2018 Publication History

Abstract

Reliability has been a challenge in the development of NAND flash memory, due to its technology size scaling and bit density improvement. To ensure the data integrity, error correction codes (ECC) with high error correction capability have been suggested. However, much higher costs will be introduced which cannot be supported for cost-limited consumer-level flash memory. Thus, low-cost ECCs are usually applied. In this work, a reliability improvement scheme is proposed for low-cost ECC enabled consumer-level flash memory. The scheme is motivated by the finding that low-cost ECC is able to protect shortened encoded data with improved reliability. This is because that the less the encoded data are, the less the errors will be occurred. With this motivation, a design is proposed to construct the shortened data case for a low-cost ECC when it cannot be able to provide the reliability requirement. Second, two relaxation approaches are proposed to relax the space reduction as it has bad effects on flash memory. A model guided evaluation is finally presented, and the results show that the lifetime can be significantly improved with little space reduction.

References

[1]
Yu Cai, Saugata Ghose, Erich F. Haratsch, Yixin Luo, and Onur Mutlu . 2017. Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives. Proc. IEEE Vol. 105, 9 (2017), 1666--1704.
[2]
Yu-Ming Chang, Yung-Chun Li, Yuan-Hao Chang, Tei-Wei Kuo, Chih-Chang Hsieh, and Hsiang-Pang Li . 2015. On Relaxing Page Program Disturbance over 3D MLC Flash Memory (ICCAD).
[3]
Y. Di, L. Shi, K. Wu, and C. J. Xue . 2016. Exploiting process variation for retention induced refresh minimization on flash memory DATE. 391--396.
[4]
H. Helgert and R. Stinaff . 1973. Shortened BCH codes (Corresp.). IEEE Transactions on Information Theory (1973).
[5]
Yang Hu, Hong Jiang, Dan Feng, Lei Tian, Hao Luo, and Shuping Zhang . {n. d.}. Performance Impact and Interplay of SSD Parallelism Through Advanced Commands, Allocation Strategy and Data Granularity. In ICS'11.
[6]
Ping Huang, Guanying Wu, Xubin He, and Weijun Xiao . 2014. An Aggressive Worn-out Flash Block Management Scheme to Alleviate SSD Performance Degradation. In EuroSys.
[7]
Xavier Jimenez, David Novo, and Paolo Ienne . 2012. Software controlled cell bit-density to improve NAND flash lifetime DAC.
[8]
Xavier Jimenez, David Novo, and Paolo Ienne . 2014. Wear unleveling: improving NAND flash lifetime by balancing page endurance. FAST.
[9]
Jung Hoon Kim, Sang Hoon Kim, and Jin Soo Kim . 2015. Subpage programming for extending the lifetime of NAND flash memory DATE. 555--560.
[10]
Myungsuk Kim, Jaehoon Lee, Sungjin Lee, Jisung Park, and Jihong Kim . 2017. Improving Performance and Lifetime of Large-Page NAND Storages Using Erase-Free Subpage Programming. In DAC. 1--6.
[11]
Han-Yi Lin and Jen-Wei Hsieh . 2015. HLC: Software-based half-level-cell flash memory. In DATE.
[12]
T. Nakamura, Y. Deguchi, and K. Takeuchi . 2017. AEP-LDPC ECC with Error Dispersion Coding for Burst Error Reduction of 2D and 3D NAND Flash Memories. In IMW. 1--4.
[13]
Yangyang Pan, Guiqiang Dong, and Tong Zhang . 2013. Error Rate-Based Wear-Leveling for nand Flash Memory at Highly Scaled Technology Nodes. TVLSI Vol. 21, 7 (2013), 1350--1354.
[14]
Heejin Park, Jaeho Kim, Jongmoo Choi, Donghee Lee, and Sam H. Noh . 2015. Incremental redundancy to reduce data retention errors in flash-based SSDs MSST.
[15]
Roman A. Pletka and Savsa Tomiç . 2016. Health-Binning: Maximizing the Performance and the Endurance of Consumer-Level NAND Flash (SYSTOR).
[16]
L. Shi, Y. Di, M. Zhao, C.J. Xue, K. Wu, and E.H.-. Sha . 2015. Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems. TVLSI Vol. PP, 99 (2015).
[17]
D. Wei, L. Deng, L. Qiao, and P. Zhang . 2016. PEVA: A Page Endurance Variance Aware Strategy for the Lifetime Extension of NAND Flash. TVLSI (2016).
[18]
Yeong-Jae Woo and Jin-Soo Kim . 2013. Diversifying wear index for MLC NAND flash memory to extend the lifetime of SSDs EMSOFT. 1--10.
[19]
Guanying Wu, Xubin He, Ningde Xie, and Tong Zhang . 2013. Exploiting Workload Dynamics to Improve SSD Read Latency via Differentiated Error Correction Codes. ToDAES (2013).
[20]
Ningde Xie, Guiqiang Dong, and Tong Zhang . 2011. Using lossless data compression in data storage systems: Not for saving space. TC (2011).
[21]
Ming-Chang Yang, Yuan-Hao Chang, Chei-Wei Tsao, and Chung-Yu Liu . 2016. Utilization-Aware Self-Tuning Design for TLC Flash Storage Devices. TVLSI (2016).
[22]
L. Zhang, B. Neely, D. Franklin, D. Strukov, Y. Xie, and F. T. Chong . 2016. Mellow Writes: Extending Lifetime in Resistive Memories through Selective Slow Write Backs. In ISCA.
[23]
Kai Zhao, Wenzhe Zhao, Hongbin Sun, Tong Zhang, Xiaodong Zhang, and Nanning Zheng . 2013. LDPC-in-SSD: making advanced error correction codes work effectively in solid state drives FAST.

Cited By

View all
  • (2020)Multitoken-Based Power Management for NAND Flash Storage DevicesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.295394839:10(2898-2910)Online publication date: Oct-2020

Recommendations

Comments

Information & Contributors

Information

Published In

cover image ACM Conferences
GLSVLSI '18: Proceedings of the 2018 Great Lakes Symposium on VLSI
May 2018
533 pages
ISBN:9781450357241
DOI:10.1145/3194554
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 May 2018

Permissions

Request permissions for this article.

Check for updates

Author Tags

  1. error correction codes
  2. flash memory
  3. reliability

Qualifiers

  • Research-article

Funding Sources

  • NSFC

Conference

GLSVLSI '18
Sponsor:
GLSVLSI '18: Great Lakes Symposium on VLSI 2018
May 23 - 25, 2018
IL, Chicago, USA

Acceptance Rates

GLSVLSI '18 Paper Acceptance Rate 48 of 197 submissions, 24%;
Overall Acceptance Rate 312 of 1,156 submissions, 27%

Upcoming Conference

GLSVLSI '25
Great Lakes Symposium on VLSI 2025
June 30 - July 2, 2025
New Orleans , LA , USA

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)3
  • Downloads (Last 6 weeks)0
Reflects downloads up to 17 Feb 2025

Other Metrics

Citations

Cited By

View all
  • (2020)Multitoken-Based Power Management for NAND Flash Storage DevicesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2019.295394839:10(2898-2910)Online publication date: Oct-2020

View Options

Login options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Figures

Tables

Media

Share

Share

Share this Publication link

Share on social media