research-article

Design of Dynamic Range Approximate Logarithmic Multipliers

Authors:

Peipei Yin,

Chenghua Wang,

Weiqiang Liu,

Fabrizio LombardiAuthors Info & Claims

GLSVLSI '18: Proceedings of the 2018 Great Lakes Symposium on VLSI

Pages 423 - 426

https://doi.org/10.1145/3194554.3194628

Published: 30 May 2018 Publication History

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Abstract

Approximate computing is an emerging approach for designing high performance and low power arithmetic circuits. The logarithmic multiplier (LM) converts multiplication into addition and has inherent approximate characteristics. A method combining the Mitchell's approximation and a dynamic range operand truncation scheme is proposed in this paper to design non-iterative and iterative approximate LMs. The accuracy and the circuit requirements of these designs are assessed to select the best approximate scheme according to different metrics. Compared with conventional non-iterative and iterative 16-bit LMs with exact operands, the normalized mean error distance (NMED) of the best proposed approximate non-iterative and iterative LMs is decreased up to 24.1% and 18.5%, respectively, while the power-delay product (PDP) is decreased up to 51.7% and 45.3%, respectively. Case studies for two error-tolerant applications show the validity of the proposed approximate LMs.

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Cited By

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Makimoto RImagawa TOchi H(2023)Approximate Logarithmic Multipliers Using Half Compensation with Two Line Segments2023 IEEE 36th International System-on-Chip Conference (SOCC)10.1109/SOCC58585.2023.10256796(1-6)Online publication date: 5-Sep-2023
https://doi.org/10.1109/SOCC58585.2023.10256796
Yin PWang CWaris HLiu WHan YLombardi F(2021)Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine LearningIEEE Transactions on Sustainable Computing10.1109/TSUSC.2020.30049806:4(612-625)Online publication date: 1-Oct-2021
https://doi.org/10.1109/TSUSC.2020.3004980
Wang ZTrefzer MBale STyrrell A(2019)Approximate Multiply-Accumulate Array for Convolutional Neural Networks on FPGA2019 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC48741.2019.9034956(35-42)Online publication date: Jul-2019
https://doi.org/10.1109/ReCoSoC48741.2019.9034956
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Index Terms

Design of Dynamic Range Approximate Logarithmic Multipliers
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Arithmetic and datapath circuits
      2. Combinational circuits

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Published In

GLSVLSI '18: Proceedings of the 2018 Great Lakes Symposium on VLSI

May 2018

533 pages

ISBN:9781450357241

DOI:10.1145/3194554

General Chair:
Deming Chen
University of Illinois, USA
,
Program Chairs:
Houman Homayoun
George Mason University, USA
,
Baris Taskin
Drexel University, USA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Published: 30 May 2018

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GLSVLSI '18: Great Lakes Symposium on VLSI 2018

May 23 - 25, 2018

IL, Chicago, USA

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GLSVLSI '18 Paper Acceptance Rate 48 of 197 submissions, 24%;

Overall Acceptance Rate 312 of 1,156 submissions, 27%

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June 30 - July 2, 2025

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Makimoto RImagawa TOchi H(2023)Approximate Logarithmic Multipliers Using Half Compensation with Two Line Segments2023 IEEE 36th International System-on-Chip Conference (SOCC)10.1109/SOCC58585.2023.10256796(1-6)Online publication date: 5-Sep-2023
https://doi.org/10.1109/SOCC58585.2023.10256796
Yin PWang CWaris HLiu WHan YLombardi F(2021)Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine LearningIEEE Transactions on Sustainable Computing10.1109/TSUSC.2020.30049806:4(612-625)Online publication date: 1-Oct-2021
https://doi.org/10.1109/TSUSC.2020.3004980
Wang ZTrefzer MBale STyrrell A(2019)Approximate Multiply-Accumulate Array for Convolutional Neural Networks on FPGA2019 14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)10.1109/ReCoSoC48741.2019.9034956(35-42)Online publication date: Jul-2019
https://doi.org/10.1109/ReCoSoC48741.2019.9034956
Liu BCai HWang ZYang J(2012)Approximate Computing for Energy-Constrained DNN-Based Speech RecognitionApproximate Computing10.1007/978-3-030-98347-5_18(451-480)Online publication date: 24-Feb-2012
https://doi.org/10.1007/978-3-030-98347-5_18

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Design of Approximate Logarithmic Multipliers

Design and evaluation of low power and area efficient approximate Booth multipliers for error tolerant applications

Design of approximate Booth multipliers based on error compensation

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