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An Efficient Cache Management Scheme for Capacitor Equipped Solid State Drives

Published: 30 May 2018 Publication History

Abstract

Within SSDs, random access memory (RAM) has been adopted as cache inside controller for achieving better performance. However, due to the volatility characteristic of RAM, data loss may happen when sudden power interrupts. To solve this issue, capacitor has been equipped inside emerging SSDs as interim supplier. However, the aging issue of capacitor will result in capacitance decreases over time. Once the remaining capacitance is not able to write all dirty pages in the cache back to flash memory, data loss may happen. In order to solve the above issue, an efficient cache management scheme for capacitor equipped SSDs is proposed in this work. The basic idea of the scheme is to bound the number of dirty pages in cache within the capability of the capacitor. Simulation results show that the proposed scheme achieves encourage improvement on lifetime and performance while power interruption induced data loss is avoided.

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Cited By

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  • (2022)SSD internal cache management policiesJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2021.102334122:COnline publication date: 1-Jan-2022
  • (2020)Boosting the Performance of SSDs via Fully Exploiting the Plane Level ParallelismIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.298789431:9(2185-2200)Online publication date: 1-Sep-2020

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cover image ACM Conferences
GLSVLSI '18: Proceedings of the 2018 Great Lakes Symposium on VLSI
May 2018
533 pages
ISBN:9781450357241
DOI:10.1145/3194554
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 30 May 2018

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Author Tags

  1. cache management
  2. capacitor
  3. flash memory

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  • Research-article

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  • NSFC

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GLSVLSI '18
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GLSVLSI '18: Great Lakes Symposium on VLSI 2018
May 23 - 25, 2018
IL, Chicago, USA

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GLSVLSI '18 Paper Acceptance Rate 48 of 197 submissions, 24%;
Overall Acceptance Rate 312 of 1,156 submissions, 27%

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GLSVLSI '25
Great Lakes Symposium on VLSI 2025
June 30 - July 2, 2025
New Orleans , LA , USA

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Cited By

View all
  • (2022)SSD internal cache management policiesJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2021.102334122:COnline publication date: 1-Jan-2022
  • (2020)Boosting the Performance of SSDs via Fully Exploiting the Plane Level ParallelismIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2020.298789431:9(2185-2200)Online publication date: 1-Sep-2020

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