Aysa Fakheri Tabrizi
Ismail Bustany
ABSTRACT
Detecting and preventing routing violations has become a critical issue in physical design, especially in the early stages. Lack of correlation between global and detailed routing congestion estimations and the long runtime required to frequently consult a global router adds to the problem. In this paper, we propose a machine learning framework to predict detailed routing short violations from a placed netlist. Factors contributing to routing violations are determined and a supervised neural network model is implemented to detect these violations. Experimental results show that the proposed method is able to predict on average 90% of the shorts with only 7% false alarms and considerably reduced computational time.
- M. Abadi and et all. 2015. TensorFlow: Large-Scale Machine Learning on Heterogeneous Systems. (2015). https://www.tensorflow.org/ Software available from tensorflow.org.Google Scholar
- I. Bustany, D. Chinnery, J. Shinnerl, and V. Yutsi. 2015. ISPD 2015 benchmarks with fence regions and routing blockages for detailed-routing-driven placement. In ISPD '15. 157--164. Google ScholarDigital Library
- W. J. Chan, P. Ho, A. B. Kahng, and P. Saxena. 2017. Routability Optimization for Industrial Designs at Sub-14Nm Process Nodes Using Machine Learning. In ISPD '17. 15--21. Google ScholarDigital Library
- Y. Chang, Y. Lee, and T. Wang. 2008. NTHU-Route 2.0: A Fast and Stable Global Router. In ICCAD '08. 338--343. Google ScholarDigital Library
- N. Chawla, N. Japkowicz, and A. Kotcz. 2004. Editorial: Special Issue on Learning from Imbalanced Data Sets. SIGKDD Explor. Newsl. 6, 1 (June 2004), 1--6. Google ScholarDigital Library
- H. He and E. A. Garcia. 2009. Learning from Imbalanced Data. IEEE Trans. on Knowl. and Data Eng. 21, 9 (Sept. 2009), 1263--1284. Google ScholarDigital Library
- ISPD15. 2015. ISPD 2015 Blockage-Aware Detailed Routing-Driven Placement Contest. http://www.ispd.cc/contests/15/ispd2015_contest.html. (2015). Accessed: 2018-04-04.Google Scholar
- N. Karimpour Darav, A. Kennings, A. Tabrizi, D. Westwick, and L. Behjat. 2016. Eh?Placer: A High-Performance Modern Technology-Driven Placer. ACM TODAES 21, 3 (2016), 37:1--37:27. Google ScholarDigital Library
- D. P. Kingma and J. Ba. 2014. Adam: A Method for Stochastic Optimization. CoRR abs/1412.6980 (2014).Google Scholar
- J. Lou, S. Krishnamoorthy, and H. S. Sheng. 2001. Estimating Routing Congestion Using Probabilistic Analysis. In ISPD '01. 112--117. Google ScholarDigital Library
- Mentor Graphics, Inc. 2015. Olympus-SoC place and route for advanced node designs. Technical Report. www.mentor.com/products/ic_nanometer_design/place-route/olympus-soc.Google Scholar
- M. Pan and C. Chu. 2007. IPR: An Integrated Placement and Routing Algorithm. In DAC '07. 59--62. Google ScholarDigital Library
- Z. Qi, Y. Cai, and Q. Zhou. 2014. Accurate prediction of detailed routing congestion using supervised data learning. In ICCAD '14. 97--103.Google Scholar
- J. Roy, N. Viswanathan, G. Nam, C. Alpert, and I. Markov. 2009. CRISP: Congestion Reduction by Iterated Spreading During Placement. In ICCAD '09. 357--362. Google ScholarDigital Library
- C. Seiffert, T. M. Khoshgoftaar, J. Van Hulse, and A. Napolitano. 2010. RUSBoost: A Hybrid Approach to Alleviating Class Imbalance. Trans. Sys. Man Cyber. Part A 40, 1 (Jan. 2010), 185--197. Google ScholarDigital Library
- D. Shi and A. Davoodi. 2017. TraPL: Track Planning of Local Congestion for Global Routing. In DAC '17. 19:1--19:6. Google ScholarDigital Library
- H. Shojaei, A. Davoodi, and J. Linderoth. 2013. Planning for Local Net Congestion in Global Routing. In ISPD '13. 85--92. Google ScholarDigital Library
- H. Shojaei, A. Davoodi, and J. T. Linderoth. 2011. Congestion Analysis for Global Routing via Integer Programming. In ICCAD '11. 256--262. Google ScholarDigital Library
- A. Tabrizi, N. Darav, L. Rakai, A. Kennings, and L. Behjat. 2017. Detailed routing violation prediction during placement using machine learning. In VLSI-DAT. 1--4.Google Scholar
- A. Tabrizi, N. Darav, L. Rakai, A. Kennings, W. Swartz, and L. Behjat. 2015. A Detailed Routing-Aware Detailed Placement Technique. In ISVLSI '15. 38--43.Google Scholar
- J. Andres Torres. 2012. ICCAD-2012 CAD Contest in Fuzzy Pattern Matching for Physical Verification and Benchmark Suite. In ICCAD '12. 349--350. Google ScholarDigital Library
- L. Wang. 2017. Experience of Data Analytics in EDA and Test - Principles, Promises, and Challenges. Trans. Comp.-Aided Des. Integ. Cir. Sys. 36, 6 (June 2017), 885--898. Google ScholarDigital Library
- L. Wang, P. Bastani, and M. Abadir. 2007. Design-silicon Timing Correlation: A Data Mining Perspective. In DAC '07. 384--389. Google ScholarDigital Library
- Y. Wei and et. all. 2012. GLARE: Global and Local Wiring Aware Routability Evaluation. In DAC '12. 768--773. Google ScholarDigital Library
- Jurjen Westra, Chris Bartels, and Patrick Groeneveld. 2004. Probabilistic Congestion Prediction. In ISPD. 204--209. Google ScholarDigital Library
- J. Westra and P. Groeneveld. 2005. Is Probabilistic Congestion Estimation Worthwhile?. In SLIP '05. 99--106. Google ScholarDigital Library
- D. Wolpert. 1996. The Lack of A Priori Distinctions Between Learning Algorithms. Neural Computation 8, 7 (1996), 1341--1390. Google ScholarDigital Library
- Y. Xu, Y. Zhang, and Ch. Chu. 2009. FastRoute 4.0: Global Router with Efficient via Minimization. In ASPDAC '09. 576--581. Google ScholarDigital Library
- Y. Yu, G. Lin, I. Jiang, and C. Chiang. 2013. Machine-learning-based Hotspot Detection Using Topological Classification and Critical Feature Extraction. In DAC '13. 67:1--67:6. Google ScholarDigital Library
- Q. Zhou, X. Wang, Z. Qi, Z. Chen, Q. Zhou, and Y. Cai. 2015. An accurate detailed routing routability prediction model in placement. In ASQED '15. 119--122.Google Scholar
Index Terms
- A machine learning framework to identify detailed routing short violations from a placed netlist
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