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CHIPS-AHOy: a predictable holistic cyber-physical hypervisor for MPSoCs

Published: 15 July 2018 Publication History

Abstract

Virtual machines (VMs) are being deployed on embedded systems to integrate multiple applications with different run-time requirements on the same physical platform. In scenarios such as autonomous vehicles, these virtualized platforms must handle varying application requirements - from strict temporal predictability to high performance - while simultaneously satisfying disparate constraints such as energy efficiency, thermal bounds, and system lifetime. To address these challenges we present CHIPS-AHOy, a prediCtable HolIstic cyber-PhySicAl HypervisOr that integrates VM isolation mechanisms with novel resource allocation approaches within a holistic observe-decide-adapt loop to achieve run-time predictability and simultaneously manage energy, thermal and wearout constraints. We present experimental results on several realistic MPSoC platforms that demonstrate the ability of CHIPS-AHOy to achieve predictable operation while conserving energy, managing temperature and extending system lifetime.

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  1. CHIPS-AHOy: a predictable holistic cyber-physical hypervisor for MPSoCs

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    cover image ACM Other conferences
    SAMOS '18: Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation
    July 2018
    263 pages
    ISBN:9781450364942
    DOI:10.1145/3229631
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 15 July 2018

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    Author Tags

    1. heterogeneous multi-core processor
    2. operating systems
    3. power management
    4. predictability
    5. real time
    6. virtualization

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    • Research-article

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    SAMOS XVIII
    SAMOS XVIII: Architectures, Modeling, and Simulation
    July 15 - 19, 2018
    Pythagorion, Greece

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    • (2024)Development of Low Power and Area Efficient Multi-core Memory Controller Using AXI4-Lite Interface ProtocolData Science and Communication10.1007/978-981-99-5435-3_50(691-703)Online publication date: 3-Jan-2024
    • (2023)Monitoring the performance of multicore embedded systems without disrupting its timing requirementsDesign Automation for Embedded Systems10.1007/s10617-023-09278-427:4(217-239)Online publication date: 1-Dec-2023
    • (2022)Online Machine Learning for Energy-Aware Multicore Real-Time Embedded SystemsIEEE Transactions on Computers10.1109/TC.2021.305607071:2(493-505)Online publication date: 1-Feb-2022
    • (2021)Flexible Cache Partitioning for Multi-Mode Real-Time Systems2021 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE51398.2021.9474240(1156-1161)Online publication date: 1-Feb-2021
    • (2021)Performance Monitoring Features in EPOS2021 XI Brazilian Symposium on Computing Systems Engineering (SBESC)10.1109/SBESC53686.2021.9628370(1-8)Online publication date: 22-Nov-2021
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    • (2019)Segment Streaming for the Three-Phase Execution Model: Design and Implementation2019 IEEE Real-Time Systems Symposium (RTSS)10.1109/RTSS46320.2019.00032(260-273)Online publication date: Dec-2019
    • (undefined)Lazy Load Scheduling for Mixed-Criticality Applications in Heterogeneous MPSoCsACM Transactions on Embedded Computing Systems10.1145/3587694

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