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Hardware Divider

Published: 13 September 2018 Publication History

Abstract

Operation division is the slowest of the four basic arithmetic operations performed in arithmetic-logic devices. In this paper we offer a proposal to speed up computations based on non-restoring division algorithm by the use of the radix-2 two's complement signed numbers. Fast computation is achieved by the early termination of the algorithm when the relevant condition is in place. A hardware implementation of the solution is proposed.

References

[1]
F. Agner, (2017), Lists of instruction latencies, throughputs and micro-operation breakdowns for Intel, AMD and VIA CPUs, Technical University of Denmark, Copyright © 1996-2017. Last updated 2017-05-02
[2]
P. Richard, B. Zimmermann, P. Zimmermann, (2010), Modern Computer Arithmetic, Cambridge Monographs on Computational and Applied Mathematics (No. 18), Cambridge University Press, November 2010, 236 pages. ISBN-13: 978-0521194693
[3]
R. Trummer, P. Zinterhof, R. Trobec, (2005), A High-Performance Data-Dependent Hardware Divider, Parallel Numerics '05, 193-206 M. Vajteršic, R. Trobec, P. Zinterhof, A. Uhl (Eds.) Chapter 7: Systems and Simulation ISBN 961-6303-67-8
[4]
S. Savas, E. Hertz, T. Nordström, Z. Ul-Abdin, (2017), Efficient Single-Precision Floating-Point Division Using Harmonized Parabolic Synthesis. In: Michael Hübner, Ricardo Reis, Mircea Stan & Nikolaos Voros (ed.), 2017 IEEE Computer Society Annual Symposium on VLSI: ISVLSI 2017 Los Alamitos: IEEE IEEE Computer Society Annual Symposium on VLSI
[5]
D. Cavagnino, A. E. Werbrouck, (2008), Efficient Algorithms for Integer Division by Constants Using Multiplication, The Computer Journal, Volume 51, Issue 4, 1 July 2008, Pages 470--480.
[6]
D. Kumar, P. Saha, A. Dandapat, (2017), Hardware Implementation of Methodologies of Fixed Point Division Algorithms, International Journal of Smart Sensing and Inteligent Systems, Vol. 10, No.3, September 2017
[7]
Takagi N., S Kadowaki, K. Takagi, (2005), A hardware algorithm for integer division, Computer Arithmetic, 2005. ARITH-17 2005. 17th IEEE Symposium on, Print ISSN: 1063-6889.

Cited By

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  • (2024)Novel Computational Kernels for Signal Processing and Digital Transformation2024 IEEE 22nd Mediterranean Electrotechnical Conference (MELECON)10.1109/MELECON56669.2024.10608614(186-191)Online publication date: 25-Jun-2024
  • (2022)A Low-Latency Divider Design for Embedded ProcessorsSensors10.3390/s2207247122:7(2471)Online publication date: 23-Mar-2022
  • (2021)High-Precision Priority Encoder Based Integer Division Algorithm2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS47672.2021.9531809(494-497)Online publication date: 9-Aug-2021

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cover image ACM Other conferences
CompSysTech '18: Proceedings of the 19th International Conference on Computer Systems and Technologies
September 2018
206 pages
ISBN:9781450364256
DOI:10.1145/3274005
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

In-Cooperation

  • ERSVB: EURORISC SYSTEMS - Varna, Bulgaria
  • FOSEUB: FEDERATION OF THE SCIENTIFIC ENGINEERING UNIONS - Bulgaria
  • UORB: University of Ruse, Bulgaria
  • TECHUVB: Technical University of Varna, Bulgaria

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 13 September 2018

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Author Tags

  1. Binary Arithmetic
  2. Hardware Divider
  3. Operation Division

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  • Research-article
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  • Refereed limited

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CompSysTech'18

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Overall Acceptance Rate 241 of 492 submissions, 49%

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Cited By

View all
  • (2024)Novel Computational Kernels for Signal Processing and Digital Transformation2024 IEEE 22nd Mediterranean Electrotechnical Conference (MELECON)10.1109/MELECON56669.2024.10608614(186-191)Online publication date: 25-Jun-2024
  • (2022)A Low-Latency Divider Design for Embedded ProcessorsSensors10.3390/s2207247122:7(2471)Online publication date: 23-Mar-2022
  • (2021)High-Precision Priority Encoder Based Integer Division Algorithm2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS47672.2021.9531809(494-497)Online publication date: 9-Aug-2021
  • (2019)Hardware Divider. Calculation of the RemainderProceedings of the 20th International Conference on Computer Systems and Technologies10.1145/3345252.3345266(31-35)Online publication date: 21-Jun-2019

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