research-article

A 0.16pJ/bit recurrent neural network based PUF for enhanced machine learning attack resistance

Authors:

Durga Prasad Sahoo,

Debdeep Mukhopadhyay,

Arindam BasuAuthors Info & Claims

ASPDAC '19: Proceedings of the 24th Asia and South Pacific Design Automation Conference

Pages 627 - 632

https://doi.org/10.1145/3287624.3287696

Published: 21 January 2019 Publication History

Abstract

Physically Unclonable Function (PUF) circuits are finding wide-spread use due to increasing adoption of IoT devices. However, the existing strong PUFs such as Arbiter PUFs (APUF) and its compositions are susceptible to machine learning (ML) attacks because the challenge-response pairs have a linear relationship. In this paper, we present a Recurrent-Neural-Network PUF (RNN-PUF) which uses a combination of feedback and XOR function to significantly improve resistance to ML attack, without significant reduction in the reliability. ML attack is also partly reduced by using a shared comparator with offset-cancellation to remove bias and save power. From simulation results, we obtain ML attack accuracy of 62% for different ML algorithms, while reliability stays above 93%. This represents a 33.5% improvement in our Figure-of-Merit. Power consumption is estimated to be 12.3μW with energy/bit of ≈ 0.16pJ.

References

[1]

A. Alvarez, W. Zhao, and M. Alioto. 2015. 14.3 15fJ/b static physically unclonable functions for secure chip identification with lt;2Inter/Intra PUF hamming distance separation in 65nm. In 2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers. 1--3.

[2]

B. Gassend, D. Lim, D. Clarke, M. van Dijk, and S. Devadas. {n. d.}. Identification and authentication of integrated circuits. Concurrency and Computation: Practice and Experience 16, 11 ({n. d.}), 1077--1098. arXiv:https://onlinelibrary.wiley.com/doi/pdf/10.1002/cpe.805

Digital Library

[3]

G. Hospodar, R. Maes, and I. Verbauwhede. 2012. Machine learning attacks on 65nm Arbiter PUFs: Accurate modeling poses strict bounds on usability. In 2012 IEEE International Workshop on Information Forensics and Security (WIFS). 37--42.

[4]

S. Jeloka, K. Yang, M. Orshansky, D. Sylvester, and D. Blaauw. 2017. A sequence dependent challenge-response PUF using 28nm SRAM 6T bit cell. In 2017 Symposium on VLSI Circuits. C270--C271.

[5]

R. Kumar and W. Burleson. 2014. On design of a highly secure PUF based on non-linear current mirrors. In 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST). 38--43.

[6]

D. Lim. 2004. Extracting secret keys from integrated circuits. M.S. thesis, Mass. Inst. Tech., Cambridge (2004).

[7]

Q. Ma, C. Gu, N. Hanley, C. Wang, W. Liu, and M. O'Neill. 2018. A machine learning attack resistant multi-PUF design on FPGA. In 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC). 97--104.

Digital Library

[8]

R. Maes. 2013. Physically Unclonable Functions: Constructions, Properties and Applications,. Springer, 32--33.

Digital Library

[9]

P. Nguyen, D. Sahoo, R. Chakraborty, and D. Mukhopadhyay. 2016. Security Analysis of Arbiter PUF and Its Lightweight Compositions Under Predictability Test. ACM Trans. Des. Autom. Electron. Syst. 22, 2, Article 20 (Dec. 2016), 28 pages.

Digital Library

[10]

U. Rührmair, F. Sehnke, J. Sölter, G. Dror, S. Devadas, and J. Schmidhuber. 2010. Modeling Attacks on Physical Unclonable Functions. In Proceedings of the 17th ACM Conference on Computer and Communications Security (CCS '10). ACM, New York, NY, USA, 237--249.

Digital Library

[11]

D. P. Sahoo, S. Saha, D. Mukhopadhyay, R. S. Chakraborty, and H. Kapoor. 2014. Composite PUF: A new design paradigm for Physically Unclonable Functions on FPGA. In 2014 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST). 50--55.

[12]

S. Stanzione, D. Puntin, and G. Iannaccone. 2011. CMOS Silicon Physical Unclonable Functions Based on Intrinsic Process Variability. IEEE Journal of Solid-State Circuits 46, 6 (June 2011), 1456--1463.

[13]

G. E. Suh and S. Devadas. 2007. Physical Unclonable Functions for Device Authentication and Secret Key Generation. In 2007 44th ACM/IEEE Design Automation Conference. 9--14.

Digital Library

[14]

A. Vijayakumar, V. C. Patil, C. B. Prado, and S. Kundu. 2016. Machine learning resistant strong PUF: Possible or a pipe dream?. In 2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST). 19--24.

[15]

Z. Wang, Y. Chen, A. Patil, J. Jayabalan, X. Zhang, C. Chang, and A. Basu. 2018. Current Mirror Array: A Novel Circuit Topology for Combining Physical Unclonable Function and Machine Learning. IEEE Transactions on Circuits and Systems I: Regular Papers 65, 4 (April 2018), 1314--1326.

[16]

P. N. Whatmough, S. K. Lee, H. Lee, S. Rama, D. Brooks, and G. Wei. 2017. 14.3 A 28nm SoC with a 1.2GHz 568nJ/prediction sparse deep-neural-network engine with gt;0.1 timing error rate tolerance for IoT applications. In 2017 IEEE International Solid-State Circuits Conference (ISSCC). 242--243.

[17]

X. Xi, H. Zhuang, N. Sun, and M. Orshansky. 2017. Strong subthreshold current array PUF with 265challenge-response pairs resilient to machine learning attacks in 130nm CMOS. In 2017 Symposium on VLSI Circuits. C268--C269.

Cited By

Shah NChatterjee DSapui BMukhopadhyay DBasu A(2021)Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack ResistanceIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2021.307576711:2(319-332)Online publication date: Jun-2021
https://doi.org/10.1109/JETCAS.2021.3075767
Zhu YGuan ZWang ZLi DWang YXu M(2021)SRAM-PUF Based Lightweight Mutual Authentication Scheme for IoT2021 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom)10.1109/ISPA-BDCloud-SocialCom-SustainCom52081.2021.00115(806-813)Online publication date: Sep-2021
https://doi.org/10.1109/ISPA-BDCloud-SocialCom-SustainCom52081.2021.00115
John RShah NVishwanath SNg SFebriansyah BJagadeeswararao MChang CBasu AMathews N(2021)Halide perovskite memristors as flexible and reconfigurable physical unclonable functionsNature Communications10.1038/s41467-021-24057-012:1Online publication date: 17-Jun-2021
https://doi.org/10.1038/s41467-021-24057-0
Show More Cited By

Index Terms

A 0.16pJ/bit recurrent neural network based PUF for enhanced machine learning attack resistance
1. Security and privacy
  1. Security in hardware
    1. Hardware security implementation
      1. Hardware-based security protocols

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cover image ACM Conferences

ASPDAC '19: Proceedings of the 24th Asia and South Pacific Design Automation Conference

January 2019

794 pages

ISBN:9781450360074

DOI:10.1145/3287624

General Chair:
Toshiyuki Shibuya
Fujitsu Laboratories

Copyright © 2019 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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IPSJ SIG-SLDM: Information Processing Society of Japan, SIG System LSI Design Methodology

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New York, NY, United States

Publication History

Published: 21 January 2019

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ASPDAC '19

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ASPDAC '19: 24th Asia and South Pacific Design Automation Conference

January 21 - 24, 2019

Tokyo, Japan

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

Shah NChatterjee DSapui BMukhopadhyay DBasu A(2021)Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack ResistanceIEEE Journal on Emerging and Selected Topics in Circuits and Systems10.1109/JETCAS.2021.307576711:2(319-332)Online publication date: Jun-2021
https://doi.org/10.1109/JETCAS.2021.3075767
Zhu YGuan ZWang ZLi DWang YXu M(2021)SRAM-PUF Based Lightweight Mutual Authentication Scheme for IoT2021 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Big Data & Cloud Computing, Sustainable Computing & Communications, Social Computing & Networking (ISPA/BDCloud/SocialCom/SustainCom)10.1109/ISPA-BDCloud-SocialCom-SustainCom52081.2021.00115(806-813)Online publication date: Sep-2021
https://doi.org/10.1109/ISPA-BDCloud-SocialCom-SustainCom52081.2021.00115
John RShah NVishwanath SNg SFebriansyah BJagadeeswararao MChang CBasu AMathews N(2021)Halide perovskite memristors as flexible and reconfigurable physical unclonable functionsNature Communications10.1038/s41467-021-24057-012:1Online publication date: 17-Jun-2021
https://doi.org/10.1038/s41467-021-24057-0
Shah NBose SChang CBasu A(2020)Reducing Temperature Induced Unreliability in Sub-Threshold Strong PUFs through Circuit Modeling2020 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS45731.2020.9180596(1-5)Online publication date: Oct-2020
https://doi.org/10.1109/ISCAS45731.2020.9180596

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