R. S. Reshma Raj
ABSTRACT
Network-on-Chip is adapted as a profitable framework for communication in on-chip multiprocessors. Congestion management using adaptive routing techniques become the major research focus in recent days. Hotspots are congested cores in multi-core systems, which has to deal with large amount of packetized data than other cores in the network. When a packet has to pass through hotspots, it will adversely affect the overall system performance. We identify the hotspot cores using counters, and propose an adaptive two-way routing algorithm by restricting some routes as in odd-even turn model to handle the presence of hotspots. The algorithm designed not only de-routes packets from current hotspots, but also reduces the possibility of nearby hotspots formation in the future. Experimental results using SPEC 2006 CPU benchmarks show that the chances of hotspots are large in highly congested traffic, and our algorithm gives about 14% average reduction in packet latency than existing routing methods in presence of hotspot cores.
- Najla Alfaraj, Junjie Zhang, Yang Xu, and H Jonathan Chao. 2011. Hope: Hotspot congestion control for clos network on chip. In Networks on Chip (NoCS), 2011 Fifth IEEE/ACM International Symposium on. IEEE, 17--24. Google Scholar
Digital Library
- Tobias Bjerregaard and Shankar Mahadevan. 2006. A survey of research and practices of network-on-chip. ACM Computing Surveys (CSUR) 38, 1 (2006), 1. Google ScholarDigital Library
- Shubhangi D Chawade, Mahendra A Gaikwad, and Rajendra M Patrikar. 2012. Review of XY routing algorithm for network-on-chip architecture. International Journal of Computer Applications 43, 21 (2012), 975--8887.Google Scholar
- Ge-Ming Chiu. 2000. The odd-even turn model for adaptive routing. IEEE Transactions on parallel and distributed systems 11, 7 (2000), 729--738. Google ScholarDigital Library
- Stephen Chui. 2016. Congestion aware adaptive routing for Network-on-Chip communication. (2016).Google Scholar
- William James Dally and Brian Patrick Towles. 2004. Principles and practices of interconnection networks. Elsevier. Google ScholarDigital Library
- Roman Gindin, Israel Cidon, and Idit Keidar. 2007. NoC-based FPGA: architecture and routing. In Proceedings of the First International Symposium on Networks-on-Chip. IEEE Computer Society, 253--264. Google ScholarDigital Library
- Adwait Gupte and Phillip Jones. 2009. Hotspot mitigation using dynamic partial reconfiguration for improved performance. In Reconfigurable Computing and FPGAs, 2009. ReConFig'09. International Conference on. IEEE, 89--94. Google ScholarDigital Library
- Ahmed Hemani, Axel Jantsch, Shashi Kumar, Adam Postula, Johnny Oberg, Mikael Millberg, and Dan Lindqvist. 2000. Network on chip: An architecture for billion transistor era. In Proceeding of the IEEE NorChip Conference, Vol. 31. 11.Google Scholar
- Wei Huang, Shougata Ghosh, Sivakumar Velusamy, Karthik Sankaranarayanan, Kevin Skadron, and Mircea R Stan. 2006. HotSpot: A compact thermal modeling methodology for early-stage VLSI design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14, 5 (2006), 501--513. Google ScholarDigital Library
- Nan Jiang, James Balfour, Daniel U Becker, Brian Towles, William J Dally, George Michelogiannakis, and John Kim. 2013. A detailed and flexible cycle-accurate network-on-chip simulator. In Performance Analysis of Systems and Software (ISPASS), 2013 IEEE International Symposium on. IEEE, 86--96.Google ScholarCross Ref
- Elena Kakoulli, Vassos Soteriou, and Theocharis Theocharides. 2012. HPRA: A pro-active Hotspot-Preventive high-performance routing algorithm for Networks-on-Chips. In Computer Design (ICCD), 2012 IEEE 30th International Conference on. IEEE, 249--255. Google ScholarDigital Library
- Elena Kakoulli, Vassos Soteriou, and Theocharis Theocharides. 2012. Intelligent hotspot prediction for network-on-chip-based multicore systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 31, 3 (2012), 418--431. Google ScholarDigital Library
- Greg M Link and Narayanan Vijaykrishnan. 2005. Hotspot prevention through runtime reconfiguration in network-on-chip. In Proceedings of the conference on Design, Automation and Test in Europe-Volume 1. IEEE Computer Society, 648--649. Google ScholarDigital Library
- Jacob Murray, Paul Wettin, Ryan Kim, Xinmin Yu, Partha Pratim Pande, Behrooz Shirazi, and Deukhyoun Heo. 2014. Thermal hotspot reduction in mm-wave wireless noc architectures. In Quality Electronic Design (ISQED), 2014 15th International Symposium on. IEEE, 645--652.Google ScholarCross Ref
- Erland Nilsson, Mikael Millberg, Johnny Oberg, and Axel Jantsch. 2003. Load distribution with the proximity congestion awareness in a network on chip. In Design, Automation and Test in Europe Conference and Exhibition, 2003. IEEE, 1126--1127. Google ScholarDigital Library
- Umit Y Ogras and Radu Marculescu. 2008. Analysis and optimization of prediction-based flow control in networks-on-chip. ACM Transactions on Design Automation of Electronic Systems (TODAES) 13, 1 (2008), 11. Google ScholarDigital Library
- RS Reshma Raj, Abhijit Das, and John Jose. 2017. Implementation and analysis of hotspot mitigation in mesh NoCs by cost-effective deflection routing technique. In Very Large Scale Integration (VLSI-SoC), 2017 IFIP/IEEE International Conference on. IEEE, 1--6.Google ScholarCross Ref
- Md Farhadur Reza, Dan Zhao, and Hongyi Wu. 2016. Task-resource co-allocation for hotspot minimization in heterogeneous many-core nocs. In Proceedings of the 26th edition on Great Lakes Symposium on VLSI. ACM, 137--140. Google ScholarDigital Library
- Han Wang, Yuzhuo Fu, Ting Liu, and Jiafang Wang. 2010. Thermal management via task scheduling for 3D NoC based multi-processor. In SoC Design Conference (ISOCC), 2010 International. IEEE, 440--444.Google ScholarCross Ref
- Dong Xiang, Gang Liu, Krishnendu Chakrabarty, and Hideo Fujiwara. 2013. Thermal-aware test scheduling for NOC-based 3D integrated circuits. In Very Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on. IEEE, 96--101.Google ScholarCross Ref
- Di Zhu, Lizhong Chen, Timothy M Pinkston, and Massoud Pedram. 2015. TAPP: Temperature-aware application mapping for NoC-based many-core processors. In Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition. EDA Consortium, 1241--1244. Google ScholarDigital Library
Index Terms
- Odd-even based adaptive two-way routing in mesh NoCs for hotspot mitigation
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