skip to main content
10.1145/3316781.3317740acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
research-article

A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus Routing

Published: 02 June 2019 Publication History

Abstract

As clock frequencies increase, topology-matching bus routing is desired to provide an initial routing result which facilitates the following buffer insertion to meet the timing constraints. Our algorithm consists of three main techniques: (1) a bus clustering method to reduce the routing complexity, (2) a DAG-based algorithm to connect a bus in the specific topology, and (3) a rip-up and re-route scheme to alleviate the routing congestion. Experimental results show that our proposed algorithm outperforms all the participating teams of the 2018 CAD Contest at ICCAD, where the top-3 routers result in 145%, 158%, and 420% higher costs than ours.

References

[1]
LEMON Graph Library. www.lemon.cs.elte.hu/trac/lemon, 2014.
[2]
2018 ICCAD CAD Contest. www.iccad-contest.org/2018/problems, 2018.
[3]
The Boost C+ + Libraries. www.boost.org/users/history/version_l_67_0, 2018.
[4]
Y. Badr, A. Torres, and P. Gupta. Mask assignment and synthesis of DSA-MP hybrid lithography for sub-7nm contacts/vias. In Proc. of DAC, 2015.
[5]
T. H. Cormen, C. E. Leiserson, R. L. Rivest, and C. Stein. Introduction to Algorithms, Third Edition. 3rd edition, 2009.
[6]
E. W. Dijkstra. A note on two problems in connexion with graphs. Numer. Math., 1(1):269--271, 1959.
[7]
L. McMurchie and C. Ebeling. Pathfinder: A negotiation-based performance-driven router for fpgas. In Third International ACM Symposium on Field-Programmable Gate Arrays, 1995.
[8]
F. Mo and R. K. Brayton. Semi-detailed bus routing with variation reduction. In Proc. of ISPD, 2007.
[9]
H.-C. Ou, H.-C. C. Chien, and Y.-W. Chang. Nonuniform multilevel analog routing with matching constraints. IEEE Tran. on CAD, 33(12):1942--1954, 2014.
[10]
M. M. Ozdal and R. F. Hentschke. Exact route matching algorithms for analog and mixed signal integrated circuits. In ICCAD - Digest of Technical Papers, 2009.
[11]
M. M. Ozdal and R. F. Hentschke. Maze routing algorithms with exact matching constraints for analog and mixed signal designs. In Proc. of ICCAD, 2012.
[12]
M. M. Ozdal and M. D. F. Wong. Algorithmic study of single-layer bus routing for high-speed boards. IEEE Tran. on CAD, 25(3):490--503, 2006.
[13]
M. M. Ozdal and M. D. F. Wong. A length-matching routing algorithm for high-performance printed circuit boards. IEEE Tran. on CAD, 25(12):2784--2794, 2006.
[14]
J.-T. Yan and Z.-W. Chen. Obstacle-aware length-matching bus routing. In Proc. of ISPD, 2011.
[15]
T. Yan and M. D. F. Wong. BSG-Route: A length-matching router for general topology. In Proc. of ICCAD, 2008.

Cited By

View all
  • (2022)Multi-Strategy Layer Assignment Algorithm Considering Bus Timing MatchingJournal of Computer-Aided Design & Computer Graphics10.3724/SP.J.1089.2022.1944634:04(545-551)Online publication date: 2-Dec-2022
  • (2021)SAT-Based On-Track Bus RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.300725340:4(735-747)Online publication date: Apr-2021
  • (2021)A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.300254640:3(533-546)Online publication date: Mar-2021
  • Show More Cited By

Index Terms

  1. A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus Routing

    Recommendations

    Comments

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    DAC '19: Proceedings of the 56th Annual Design Automation Conference 2019
    June 2019
    1378 pages
    ISBN:9781450367257
    DOI:10.1145/3316781
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    In-Cooperation

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 02 June 2019

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. Advance Technologies
    2. Bus Routing
    3. Physical Design
    4. Topology Matching

    Qualifiers

    • Research-article
    • Research
    • Refereed limited

    Conference

    DAC '19
    Sponsor:

    Acceptance Rates

    Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

    Upcoming Conference

    DAC '25
    62nd ACM/IEEE Design Automation Conference
    June 22 - 26, 2025
    San Francisco , CA , USA

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)33
    • Downloads (Last 6 weeks)1
    Reflects downloads up to 27 Feb 2025

    Other Metrics

    Citations

    Cited By

    View all
    • (2022)Multi-Strategy Layer Assignment Algorithm Considering Bus Timing MatchingJournal of Computer-Aided Design & Computer Graphics10.3724/SP.J.1089.2022.1944634:04(545-551)Online publication date: 2-Dec-2022
    • (2021)SAT-Based On-Track Bus RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.300725340:4(735-747)Online publication date: Apr-2021
    • (2021)A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus RoutingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.300254640:3(533-546)Online publication date: Mar-2021
    • (2021)Spotting Current Location of the Public Bus with its Destination and Live Details Through Mobile Application2021 International Conference on System, Computation, Automation and Networking (ICSCAN)10.1109/ICSCAN53069.2021.9526424(1-5)Online publication date: 30-Jul-2021
    • (2021)Efficient Use of Randomisation Algorithms for Probability Prediction in Baccarat Using: Monte Carlo and Las Vegas MethodProceedings of the International Conference on Paradigms of Computing, Communication and Data Sciences10.1007/978-981-15-7533-4_8(91-103)Online publication date: 20-Feb-2021
    • (2020)MiniDeviation: An Efficient Multi-Stage Bus-Aware Global Router2020 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)10.1109/VLSI-DAT49148.2020.9196219(1-4)Online publication date: Aug-2020
    • (2020)Obstacle-Avoiding Length-Matching Bus Routing Considering Nonuniform Track ResourcesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.298531228:8(1881-1892)Online publication date: Aug-2020

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Figures

    Tables

    Media

    Share

    Share

    Share this Publication link

    Share on social media