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Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias

Published: 02 June 2019 Publication History

Abstract

We propose approximate dividers with near-zero error bias for both integer and floating-point numbers. The integer divider, INZeD, is designed using a novel, analytically deduced error-correction method in an approximate log based divider. The floating-point divider, FaNZeD, is based on a highly optimized mantissa divider that is inspired by INZeD. Both of the dividers are error configurable.
Our results show that the INZeD dividers have error bias in the range of 0.01-4.4% with area-delay product improvement of 25× - 95× and power improvement of 4.7× - 15× when compared to the accurate integer divider. Likewise, compared to IEEE single-precision floating-point divider, FaNZeD dividers offer up to 985× area-delay product and 77× power improvements with error bias in the range of 0.04-2.2%. Most importantly, using our FaNZeD dividers, floating-point arithmetic can be more resource-efficient than fixed-point arithmetic because most of the FaNZeD dividers are even smaller and have better area-delay product than the 8-bit and 16-bit accurate integer dividers. Finally, our dividers show negligible effect on the output quality when evaluated with AlexNet and JPEG compression applications.

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  1. Approximate Integer and Floating-Point Dividers with Near-Zero Error Bias

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      cover image ACM Conferences
      DAC '19: Proceedings of the 56th Annual Design Automation Conference 2019
      June 2019
      1378 pages
      ISBN:9781450367257
      DOI:10.1145/3316781
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      Published: 02 June 2019

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      • (2024)PACE: A Piece-Wise Approximate and Configurable Floating - Point Divider for Energy - Efficient Computing2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546711(1-6)Online publication date: 25-Mar-2024
      • (2024)PACE: A Piece-Wise Approximate Floating-Point Divider with Runtime Configurability and High Energy EfficiencyACM Transactions on Design Automation of Electronic Systems10.1145/370663430:2(1-23)Online publication date: 16-Dec-2024
      • (2023)ILAFD: Accuracy-Configurable Floating-Point Divider Using an Approximate Reciprocal and an Iterative Logarithmic MultiplierProceedings of the Great Lakes Symposium on VLSI 202310.1145/3583781.3590262(639-644)Online publication date: 5-Jun-2023
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      • (2022)An Energy-Efficient Approximate Divider Based on Logarithmic Conversion and Piecewise Constant ApproximationIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2022.316789469:7(2655-2668)Online publication date: Jul-2022
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