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Implementation of 4-Bit Data Transmission for Accessing SD Card with FPGA Embedded Soft Processor

Authors:

Gul Munir Ujjan,

Abdul Malik,

Shakil Ahmed,

Mohd Zaid AbdullahAuthors Info & Claims

ICIIT '19: Proceedings of the 2019 4th International Conference on Intelligent Information Technology

Pages 67 - 72

https://doi.org/10.1145/3321454.3321475

Published: 20 February 2019 Publication History

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Abstract

Secure Digital (SD) cards being removable, non-volatile and flash memory in nature, are highly preferred for use in FPGA based systems as secondary storage. Currently most FPGA developers prefer 1-bit SD mode data transmission as a mean to access the SD card due to the complexity of 4-bit serial design. Hence, the speed is significantly compromised. This paper discusses the design and implementation of a firmware for 4-bit SD mode data transmission. A simple hardware application based on switches, buttons, memory and SD card interface is used to illustrate the functionality of proposed firmware, particularly the generation of the required control signal for data access. Meanwhile the Verilog HDL is used for hardware design while the software control is coded in C language. The system is implemented on Altera DE-4 board with FPGA Stratix IV GX EP4SGX230 and 32-bit NIOS-II embedded soft processor. In terms of data throughput the new firmware is 80 % much faster compared to a standard 1-bit data transmission when accessing a single block of data.

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S NNath SM US SM YKrishnaa M L(2023)Image Display using FPGA with BRAM and VGA Interface for Multimedia Applications2023 8th International Conference on Communication and Electronics Systems (ICCES)10.1109/ICCES57224.2023.10192822(77-83)Online publication date: 1-Jun-2023
https://doi.org/10.1109/ICCES57224.2023.10192822
Nath SNavaneethan SSakthekannan MUdaya Krishnan MYogavignes B(2022)SD Card Interface Using FPGA for Multimedia Applications2022 6th International Conference on Electronics, Communication and Aerospace Technology10.1109/ICECA55336.2022.10009420(388-394)Online publication date: 1-Dec-2022
https://doi.org/10.1109/ICECA55336.2022.10009420

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Implementation of 4-Bit Data Transmission for Accessing SD Card with FPGA Embedded Soft Processor
1. Hardware
  1. Communication hardware, interfaces and storage

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ICIIT '19: Proceedings of the 2019 4th International Conference on Intelligent Information Technology

February 2019

124 pages

ISBN:9781450366335

DOI:10.1145/3321454

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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USM: Universiti Sains Malaysia

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Published: 20 February 2019

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ICIIT '19

ICIIT '19: 2019 4th International Conference on Intelligent Information Technology

February 20 - 23, 2019

Nang, Da, Viet Nam

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S NNath SM US SM YKrishnaa M L(2023)Image Display using FPGA with BRAM and VGA Interface for Multimedia Applications2023 8th International Conference on Communication and Electronics Systems (ICCES)10.1109/ICCES57224.2023.10192822(77-83)Online publication date: 1-Jun-2023
https://doi.org/10.1109/ICCES57224.2023.10192822
Nath SNavaneethan SSakthekannan MUdaya Krishnan MYogavignes B(2022)SD Card Interface Using FPGA for Multimedia Applications2022 6th International Conference on Electronics, Communication and Aerospace Technology10.1109/ICECA55336.2022.10009420(388-394)Online publication date: 1-Dec-2022
https://doi.org/10.1109/ICECA55336.2022.10009420

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An FPGA implementation for neural networks with the FDFM processor core approach

FPGA implementation of a HW/SW platform for multimedia embedded systems

A novel AES-256 implementation on FPGA using co-processor based architecture

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