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Breaking master-slave model between host and FPGAs

Published: 19 February 2020 Publication History

Abstract

This paper proposes to enhance current task-based programming models by breaking their current master-slave approach between the main processor and its hardware accelerators. As a proof-of-concept, it presents an extension of the OmpSs@FPGA toolchain that allows the tasks offloaded into the FPGA to create and synchronize nested tasks on their own without involving the host. Those FPGA spawned tasks may target the host to execute code not suitable for the FPGA, like system calls or I/O operations; or target other kernel accelerators inside the same FPGA. In addition to the programmability benefits of this new feature, the proposed system presents significant performance improvements and a better productivity over the classical master-slave approach.

References

[1]
Jaume Bosch, Xubin Tan, Antonio Filgueras, Miquel Vidal, Marc Mateu, Daniel Jiménez-González, Carlos Álvarez, Xavier Martorell, Eduard Ayguadé, and Jesús Labarta. 2018. Application Acceleration on FPGAs with OmpSs@FPGA. In 2018 International Conference on Field-Programmable Technology (FPT). 70--77.
[2]
Lukas Sommer, Jens Korinth, and Andreas Koch. 2017. OpenMP device offloading to FPGA accelerators. In 2017 IEEE 28th International Conference on Application-specific Systems, Architectures and Processors (ASAP). 201--205.

Cited By

View all
  • (2023)FPGA Framework Improvements for HPC Applications2023 International Conference on Field Programmable Technology (ICFPT)10.1109/ICFPT59805.2023.00048(286-287)Online publication date: 12-Dec-2023
  • (2022)High Performance Computing PP-Distance Algorithms to Generate X-ray Spectra from 3D ModelsInternational Journal of Molecular Sciences10.3390/ijms23191140823:19(11408)Online publication date: 27-Sep-2022
  • (2021)Assessment of OpenMP Master–Slave Implementations for Selected Irregular Parallel ApplicationsElectronics10.3390/electronics1010118810:10(1188)Online publication date: 16-May-2021
  • Show More Cited By

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Published In

cover image ACM Conferences
PPoPP '20: Proceedings of the 25th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
February 2020
454 pages
ISBN:9781450368186
DOI:10.1145/3332466
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 19 February 2020

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Author Tags

  1. FPGA
  2. OmpSs
  3. OpenMP
  4. heterogeneous computing
  5. runtime
  6. task-based parallelism

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PPoPP '20

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PPoPP '20 Paper Acceptance Rate 28 of 121 submissions, 23%;
Overall Acceptance Rate 230 of 1,014 submissions, 23%

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Cited By

View all
  • (2023)FPGA Framework Improvements for HPC Applications2023 International Conference on Field Programmable Technology (ICFPT)10.1109/ICFPT59805.2023.00048(286-287)Online publication date: 12-Dec-2023
  • (2022)High Performance Computing PP-Distance Algorithms to Generate X-ray Spectra from 3D ModelsInternational Journal of Molecular Sciences10.3390/ijms23191140823:19(11408)Online publication date: 27-Sep-2022
  • (2021)Assessment of OpenMP Master–Slave Implementations for Selected Irregular Parallel ApplicationsElectronics10.3390/electronics1010118810:10(1188)Online publication date: 16-May-2021
  • (2021)OmpSs@FPGA framework for high performance FPGA computingIEEE Transactions on Computers10.1109/TC.2021.3086106(1-1)Online publication date: 2021
  • (2021)Task-Based Programming Models for Heterogeneous Recurrent WorkloadsApplied Reconfigurable Computing. Architectures, Tools, and Applications10.1007/978-3-030-79025-7_8(108-122)Online publication date: 23-Jun-2021

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