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As Workshops Co-Chairs of the 48th International Conference on Parallel Processing (ICPP) 2019, we would like to warmly welcome everyone to enjoy the conference program as well as the several workshops, which will be held on August 5 in Kyoto, Japan. Workshops are an important part of the ICPP conference given that they provide a flexible forum for practitioners of areas related to parallel processing to be able to discuss new trends and opportunities in particular topics of their interest.
Mixed synchronous and asynchronous duty-cycling protocol in sensor networks
Wireless Sensor Networks are usually relying on the energy source to the battery, so lifetime of the sensor nodes is limited. Duty Cycling is known as one of the methods to reduce the energy consumption of wireless sensor networks. Therefore, efficient ...
A Proposal of Care Planning Infrastructure Platform for Reducing Burden on Caretakers in Nursing Homes
In this paper, we introduce a novel care planning infrastructure platform for reducing the burden on caretakers in nursing homes. The goal of this study is to empirically confirm that the burden on caretakers working at a real nursing home is ...
Turn Prediction for Special Intersections and Its Case Study
The effect of growing population brings heavy traffic which in turn leads to increased number of traffic accidents. In particular, the majority of traffic accidents happen at special intersections in situations such as heavy traffic, poor intersection ...
An Analysis of Contracts and Relationships between Supercomputing Centers and Electricity Service Providers
Increases in peak electricity demands and the growing use of renewable energy --- with associated intermittency and variable output --- present new challenges to electricity service providers (ESPs). ESPs employ demand charges, variable tariffs and ...
Operational Data Analytics: Optimizing the National Energy Research Scientific Computing Center Cooling Systems
- Norman Bourassa,
- Walker Johnson,
- Jeff Broughton,
- Deirdre McShane Carter,
- Sadie Joy,
- Raphael Vitti,
- Peter Seto
In 2017/2018, the Energy Efficient HPC Working Group (EE HPC WG) Dashboard Team conducted an analysis that assessed the current use of information dashboards for operational facility management in major supercomputing centers around the globe, resulting ...
Modeling the Existing Cooling System to Learn its Behavior for Post-K Supercomputer at RIKEN R-CCS
At RIKEN, we are developing supercomputer Fugaku (formerly called as Post-K), which is the successor of K Computer, and aiming for official operation around 2021. It is expected to consume more power than K Computer, and because of the power saving ...
Designing an Energy-Efficient HPC Supercomputing Center
This paper presents design considerations that drive the development of an energy-efficient, high performance computing (HPC) data center facility. Key electrical and mechanical design considerations will be presented that maximize facility efficiency, ...
Paving the Way Toward Energy-Aware and Automated Datacentre
- Andrea Bartolini,
- Francesco Beneventi,
- Andrea Borghesi,
- Daniele Cesarini,
- Antonio Libri,
- Luca Benini,
- Carlo Cavazzoni
Energy efficiency and datacentre automation are critical targets of the research and deployment agenda of CINECA and its research partners in the Energy Efficient System Laboratory of the University of Bologna and the Integrated System Laboratory in ETH ...
Grid Accommodation of Dynamic HPC Demand
Sudden and short-duration power swings in modern supercomputers can have a challenging impact on the voltage of the adjacent power grids. The coming age of exascale supercomputers is expected to bring platforms that are capable of power fluctuations of ...
Collecting, Monitoring, and Analyzing Facility and Systems Data at the National Energy Research Scientific Computing Center
As high-performance computing (HPC) resources continue to grow in size and complexity, so too does the volume and velocity of the operational data that is associated with them. At such scales, new mechanisms and technologies are required to continuously ...
(Dis)Advantages of Lock-free Synchronization Mechanisms for Multicore Embedded Systems
Embedded systems show a tendency of migrating to multicore processors. However, to fully use the potential of multicore processors, it is necessary to partition software into threads that execute concurrently and communicate using shared memory. In ...
Translating AArch64 Floating-Point Instruction Set to the x86-64 Platform
Binary translation translates binary programs from one instruction set to another. It is widely used in virtual machines and emulators. We extend mc2llvm, which is an LLVM-based retargetable 32-bit binary translator developed in our lab in the past ...
Devise Rust Compiler Optimizations on RISC-V Architectures with SIMD Instructions
Recently, Rust has become a popular system programming language and been widely used in microkernel OS designs, cryptocurrency designs, deep learning applications, and web browsers. Rust is designed for highly safe and concurrent systems and provides ...
Accelerate DNN Performance with Sparse Matrix Compression in Halide
Machine learning nowadays is profoundly impacting every aspect of our lives. With the evolution of the machine learning, many techniques, such as deep learning, improve the accuracy and performance of machine learning. Deep learning is a set of ML ...
Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling
Due to the non-deterministic order of interactions between concurrent threads, testing of concurrent software is a challenge. In order to cope with this challenge, researchers have proposed analysis approaches in which the dynamic-based algorithms (e.g.,...
Constructing Skeleton for Parallel Applications with Machine Learning Methods
Performance prediction has always been important in the domain of parallel computing. For programs which are executed on workstation clusters and super computing systems, precise prediction of execution time can help task scheduling and resource ...
Collective Communication for the RISC-V xBGAS ISA Extension
Parallel programming methodologies are fundamentally dissimilar to those of conventional programming, and software developers without the requisite skillset often find it difficult to adapt to these new methods. This is particularly true for parallel ...
MPI Collectives for Multi-core Clusters: Optimized Performance of the Hybrid MPI+MPI Parallel Codes
The advent of multi-/many-core processors in clusters advocates hybrid parallel programming, which combines Message Passing Interface (MPI) for inter-node parallelism with a shared memory model for on-node parallelism. Compared to the traditional hybrid ...
Pyne: A programming framework for parallel simulation development
This paper proposes Pyne, a parallel programming framework for developing parallel simulations. Pyne is designed such that parallel applications are developed with sequential programming. Pyne provides a programming environment in which programmers ...
Accelerating Hyperparameter Optimisation with PyCOMPSs
Machine Learning applications now span across multiple domains due to the increase in computational power of modern systems. There has been a recent surge in Machine Learning applications in High Performance Computing (HPC) in an attempt to speed up ...
Performance Optimizations and Analysis of Distributed Deep Learning with Approximated Second-Order Optimization Method
Faster training of deep neural networks is desired to speed up the research and development cycle in deep learning. Distributed deep learning and second-order optimization methods are two different techniques to accelerate the training of deep neural ...
Reducing global reductions in large-scale distributed training
Current large-scale training of deep neural networks typically employs synchronous stochastic gradient descent that incurs large communication overhead. Instead of optimizing reduction routines as done in recent studies, we propose algorithms that do ...
On the Quality of Wall Time Estimates for Resource Allocation Prediction
Today's HPC systems experience steadily increasing problems with the storage I/O bottleneck. At the same time, new storage technologies are emerging in the compute nodes of HPC systems. There are many ideas and approaches how compute-node local storage ...
A Hibernation Aware Dynamic Scheduler for Cloud Environments
Nowadays, cloud platforms usually offer several types of Virtual Machines (VMs) which have different guarantees in terms of availability and volatility, provisioning the same resource through multiple pricing models. For instance, in the Amazon EC2 ...
Task Scheduling for Heterogeneous Computing using a Predict Cost Matrix
This paper presents a list-based scheduling algorithm called Predict Priority Task Scheduling (PPTS) for heterogeneous computing. The main goal is to minimize the scheduling length by introducing a lookahead feature in the two phases of the PPTS ...
QoS-Aware Proactive Data Replication for Big Data Analytics in Edge Clouds
We are in the era of big data and cloud computing, large quantity of computing resource is desperately needed to detect invaluable information hidden in the coarse big data through query evaluation. Users demand big data analytic services with various ...
LPMS: A Low-cost Topology-aware Process Mapping Method for Large-scale Parallel Applications on Shared HPC Systems
Topology-aware process mapping can reduce communication cost by embedding the application communication topology to the underlying networks. Being generally a NP-hard problem, process mapping methods strive to balance mapping cost and mapping ...
Index Terms
- Workshop Proceedings of the 48th International Conference on Parallel Processing
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Acceptance Rates
Year | Submitted | Accepted | Rate |
---|---|---|---|
ICPP '18 | 313 | 91 | 29% |
Overall | 313 | 91 | 29% |