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Hardware Divider. Calculation of the Remainder

Published: 21 June 2019 Publication History

Abstract

Theoretical basis and the resulting algorithm for calculating the remainder of 2's complement signed numbers integer division operation is presented. A logic scheme for calculating the remainder according to the non-restoring division algorithm is synthesized. A structural scheme for micro-pipeline organization of the computations is presented. The logic scheme, along with that for computation of the quotient for the same operation (synthesized and published earlier by us [7]), makes a division operation executable over time to switch the entire combinational scheme. Thus, the calculation of the two results from operation division by this logical scheme is as fast as possible, which can be achieved. The functionality of the scheme is illustrated by numerical examples.

References

[1]
. Richard, P., Zimmermann, B., Zimmermann, P., (2010), Modern Computer Arithmetic, Cambridge Monographs on Computational and Applied Mathematics (No. 18), Cambridge University Press, November 2010, 236 pages. ISBN-13: 978--0521194693.
[2]
. Cavagnino, D., Werbrouck, A., (2008), Efficient Algorithms for Integer Division by Constants Using Multiplication, The Computer Journal, Volume 51, Issue 4, 1 July 2008, Pages 470--480.
[3]
. Kumar, D., Saha, P., Dandapat, A., (2017), Hardware Implementation of Methodologies of Fixed Point Division Algorithms, International Journal of Smart Sensing and Inteligent Systems, Vol. 10, No.3, September 2017.
[4]
Tyanev, D. S., (2008) Computer Organization. Tom1, Tom 2, Technical University of Varna, ISBN: 978-954-20-0412-7, ISBN 978-954-20-0413-4. http://www.tyanev.com/home.php?lang=bg&mid=18&mod=1&b=12
[5]
. Trummer, R., Zinterhof, P., Trobec, R., (2005), A High-Performance Data-Dependent Hardware Divider, Parallel Numerics'05, 193-206 M. Vajteřsic, R. Trobec, P. Zinterhof, A. Uhl (Eds.) Chapter 7: Systems and Simulation, ISBN: 961-6303-67-8.
[6]
. Takagi N., Kadowaki, S., Takagi, K., (2005), A hardware algorithm for integer division. Computer Arithmetic. ARITH-17 2005, 17th IEEE Symposium, ISSN: 1063--6889.
[7]
. Tyanev, D. S., Petkova, Y. P., (2015), Logic scheme for determining the number of leftmost insignificant digits in a bit-set of any length. SciTechnol: Journal of Computer Engineering & Information Technology, USA, ISSN: 2324-9307, 2015, Vol. 4, Issue 1. https://www.scitechnol.com/logic-scheme-for-determining-the-number-of-leftmost-insignificant-digits-in-a-bitset-of-any-length-RjK.php?article_id=3259
[8]
. Tyanev, D. S., Petkova, Y. P., (2018), Hardware Divider. In Processing of ACM CompSysTech'18. ACM New York, USA, pages 139--143. ISBN: 978-1-45-6425-6.
[9]
Tyanev, D. S., (2007) Computer organization. Digital arithmetics -- exercises, Technical University of Varna, ISBN: 954-20-0258-0. http://www.tyanev.com/home.php?lang=bg&mid=18&mod=1&b=7.
[10]
Tyanev, D. S., (2016), Asynchronous pipeline systems with common structures (Synthesis Methodology), Technical University of Varna. http://www.tyanev.com/home.php?lang=bg&mid=18&mod=1&b=14

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  • (2022) TEA-Z: A Tiny and Efficient Architecture Based on Z Channel for Image Watermarking and Its Versatile Hardware Implementation IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.316463441:12(5275-5287)Online publication date: Dec-2022

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    CompSysTech '19: Proceedings of the 20th International Conference on Computer Systems and Technologies
    June 2019
    365 pages
    ISBN:9781450371490
    DOI:10.1145/3345252
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    • UORB: University of Ruse, Bulgaria

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    Published: 21 June 2019

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    Author Tags

    1. Binary Arithmetic
    2. Hardware Divider
    3. Operation Division
    4. Remainder

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    • (2022) TEA-Z: A Tiny and Efficient Architecture Based on Z Channel for Image Watermarking and Its Versatile Hardware Implementation IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.316463441:12(5275-5287)Online publication date: Dec-2022

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