research-article

ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions

Authors:

Zeshan A. Chishti,

Alaa R. AlameldeenAuthors Info & Claims

MICRO '52: Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture

Pages 126 - 138

https://doi.org/10.1145/3352460.3358305

Published: 12 October 2019 Publication History

Abstract

Deep Neural Networks (DNNs) are becoming the prevalent approach in computer vision, machine learning, natural language processing, and speech recognition applications. Although DNNs are perceived as compute-intensive tasks, they also apply intense pressure on the capacity and bandwidth of the memory hierarchy, primarily due to the large intermediate data communicated across network layers. Prior work on hardware DNN accelerators leverages the cross-layer data sparsity via fully-customized datapaths. However, dynamically compressing/expanding such data is a challenging task for general-purpose multi-processors with virtual memory and hardware-managed coherent cache hierarchies.

In this paper, we observe that the DNN intermediate data is either sequentially streamed or reshaped with a regular transformation between layers. Hence, accesses to this data can tolerate a sequential or block sequential compression/expansion without requiring random element retrieval. Based on this insight, we propose ZCOMP, a CPU vector ISA extension tailored for DNN cross-layer communication. ZCOMP compactly represents zero value compression/expansion and fully automates the metadata generation, storage and retrieval which eliminates the need for several extra instruction executions and register usage. ZCOMP can be targeted both for inference and training to dynamically compress/expand cross-layer data before being written to memory. Our evaluations for individual layers and end-to-end DNN networks demonstrate that ZCOMP offers substantial data traffic reduction, both on-chip across cache-hierarchy and off-chip to DRAM, and performance improvements over no compression and existing AVX512 compression approaches.

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Index Terms

ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions
1. Computer systems organization
  1. Architectures
    1. Other architectures
      1. Neural networks
    2. Parallel architectures
      1. Single instruction, multiple data

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cover image ACM Conferences

MICRO '52: Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture

October 2019

1104 pages

ISBN:9781450369381

DOI:10.1145/3352460

Copyright © 2019 ACM.

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Published: 12 October 2019

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MICRO '52: The 52nd Annual IEEE/ACM International Symposium on Microarchitecture

October 12 - 16, 2019

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https://doi.org/10.23919/DATE58400.2024.10546765
Foukalas F(2024)A Survey of Artificial Neural Network Computing SystemsCognitive Computation10.1007/s12559-024-10383-017:1Online publication date: 22-Nov-2024
https://doi.org/10.1007/s12559-024-10383-0
Wang CXiao YGao XLi LWang J(2023)A Framework for Behavioral Biometric Authentication Using Deep Metric Learning on Mobile DevicesIEEE Transactions on Mobile Computing10.1109/TMC.2021.307260822:1(19-36)Online publication date: 1-Jan-2023
https://doi.org/10.1109/TMC.2021.3072608
Jeong GDamani SBambhaniya AQin EHughes CSubramoney SKim HKrishna T(2023)VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10071058(259-272)Online publication date: Feb-2023
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