Cut Optimization for Redundant Via Insertion in Self-Aligned Double Patterning
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- Cut Optimization for Redundant Via Insertion in Self-Aligned Double Patterning
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Redundant Via Insertion with Cut Optimization for Self-Aligned Double Patterning
GLSVLSI '17: Proceedings of the Great Lakes Symposium on VLSI 2017Line-end cuts are employed to enable 1D gridded designs in self-aligned double patterning (SADP) process. Due to the minimum spacing constraints between adjacent cuts, cut optimization is important component. However, it brings a new challenge to ...
Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithography
DAC '15: Proceedings of the 52nd Annual Design Automation ConferenceSelf-aligned double patterning (SADP) with complementary e-beam lithography (EBL) is one of the most promising hybrid-lithography techniques for sub-20nm designs. The complementary EBL mitigates the deficiencies of using a single cut mask in SADP. ...
Fast and Optimal Redundant Via Insertion
Redundant via insertion is highly effective in improving chip yield and reliability. In this paper, we study the problem of double-cut via insertion (DVI) in a post-routing stage, where a single via can have, at most, one redundant via inserted next to ...
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Association for Computing Machinery
New York, NY, United States
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- World Class 300 R8D Project of MSS
- National Research Foundation of Korea (NRF) of MSIP
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