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Performance Portable FPGA Design

Published: 24 February 2020 Publication History

Abstract

FPGA platforms are widely used for application acceleration. Although a number of high-level design frameworks exist, application and performance portability across different platforms remain challenging. To address the above problem, we propose an API design for high-level development tools to separate platform-dependent code from the remaining application design. Additionally, we propose design guidelines to assist with performance portability. To demonstrate our techniques, a large-scale application, originally developed for an Intel Stratix-V FPGA is ported to several new Xilinx Virtex UltraScale+ systems. The accelerated application, developed in a high-level framework, is rapidly moved onto the new platforms with minimal changes. The original, unmodified kernel code delivers a 1.74x speedup due to increased clock frequency on the new platform. Subsequently, the application is further optimised to make use of the additional resources available on the larger Ultrascale+ FPGAs, guided by a simple analytical performance model. This results in an additional performance increase of up to 7.4x. Using the presented framework, we demonstrate rapid deployment of the same application across a number of different platforms that leverage the same FPGA family but differ in their low-level implementation details and the available peripherals. As a result, the same application code supports five different platforms: Maxeler MAX5C DFE, Amazon EC2 F1, Xilinx Alveo U200, U250 and the original Intel Stratix-V accelerator card, with performance close to what is theoretically achievable for each of these platforms.

Cited By

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  • (2021)A Cross-Platform OpenVX Library for FPGA Accelerators2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)10.1109/PDP52278.2021.00020(75-83)Online publication date: Mar-2021
  • (2021)A cross-platform OpenVX library for FPGA acceleratorsJournal of Systems Architecture10.1016/j.sysarc.2021.102372(102372)Online publication date: Dec-2021

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cover image ACM Conferences
FPGA '20: Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
February 2020
346 pages
ISBN:9781450370998
DOI:10.1145/3373087
Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 24 February 2020

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Author Tags

  1. fpga acceleration
  2. high level design
  3. high level synthesis
  4. performance modelling
  5. performance portability

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FPGA '20
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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

View all
  • (2021)A Cross-Platform OpenVX Library for FPGA Accelerators2021 29th Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP)10.1109/PDP52278.2021.00020(75-83)Online publication date: Mar-2021
  • (2021)A cross-platform OpenVX library for FPGA acceleratorsJournal of Systems Architecture10.1016/j.sysarc.2021.102372(102372)Online publication date: Dec-2021

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