Establishing Trust in Microelectronics

In recent years, substantial attention has been drawn to vulnerabilities in the architectural design of microelectronics, as well as the security of their global supply chains. In reality, establishing trust in microelectronics requires broader considerations, from verification of the software leveraged to implement hardware designs, to analyzing third-party intellectual property cores, all the way to run-time design assurance and periodic device screening post-deployment. These concerns are relevant to stakeholders at all levels, from small independent design houses all the way to multi-national strategic interests. One notable example of the latter is the U.S. Department of Defense's Trusted and Assured Microelectronics (T&AM) program, which seeks assured access to state-of-the-art foundries through modern trust and assurance methods and demonstrations [1]. This talk will describe research efforts at the Georgia Tech Research Institute centered around providing assurance of FPGAs. Current research thrusts include the development of verification techniques at multiple stages of the design process, including vendor design software execution, implementation of user designs, and even the operation of the underlying physical device hardware itself. For example, to address trust in synthesis and implementation of high-level user source code, we discuss the development of canary circuits which are compiled alongside user design circuits and can be independently inspected and verified to ensure adherence to user-defined implementation rules. Additionally, we discuss one avenue for providing trust in vendor hardware devices through our development of Independent Functional Test (IFT) suites.