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Decision Making in Synthesis cross Technologies using LSTMs and Transfer Learning

Published: 16 November 2020 Publication History

Abstract

We propose a general approach that precisely estimates the Quality-of-Result (QoR), such as delay and area, of unseen synthesis flows for specific designs. The main idea is leveraging LSTM-based network to forecast the QoR, where the inputs are synthesis flows represented in novel timed-flow modeling, and QoRs are ground truth. This approach is demonstrated with 1.2 million data points collected using 14nm, 7nm regular-voltage (RVT), and 7nm low-voltage (LVT) technologies with twelve IC designs. The accuracy of predicting the QoRs (delay and area) evaluated using mean absolute prediction error (MAPE). While collecting training data points in EDA can be extremely challenging, we propose to elaborate transfer learning in our approach, which enables accurate predictions cross different technologies and different IC designs. Our transfer learning approach obtains estimation MAPE 3.7% over 960,000 test points collected on 7nm technologies, with only 100 data points used for training the pre-trained LSTM network using 14nm dataset.

Supplementary Material

MP4 File (3380446.3430638.mp4)
Decision Making in Synthesis cross Technologies using LSTMs and Transfer Learning. Cunxi Yu, Wang Zhou. MLCAD 2020 Presentation video.

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  • (2025)Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation TechniquesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.342090444:1(200-213)Online publication date: Jan-2025
  • (2024)CBTune: Contextual Bandit Tuning for Logic Synthesis2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546766(1-6)Online publication date: 25-Mar-2024
  • (2024)ReLS: Retrieval Is Efficient Knowledge Transfer For Logic SynthesisProceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD10.1145/3670474.3685946(1-7)Online publication date: 9-Sep-2024
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      cover image ACM Conferences
      MLCAD '20: Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD
      November 2020
      183 pages
      ISBN:9781450375191
      DOI:10.1145/3380446
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 16 November 2020

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      Author Tags

      1. electronic design automation
      2. machine learning
      3. transfer learning

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      MLCAD '20: 2020 ACM/IEEE Workshop on Machine Learning for CAD
      November 16 - 20, 2020
      Virtual Event, Iceland

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      View all
      • (2025)Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation TechniquesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.342090444:1(200-213)Online publication date: Jan-2025
      • (2024)CBTune: Contextual Bandit Tuning for Logic Synthesis2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546766(1-6)Online publication date: 25-Mar-2024
      • (2024)ReLS: Retrieval Is Efficient Knowledge Transfer For Logic SynthesisProceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD10.1145/3670474.3685946(1-7)Online publication date: 9-Sep-2024
      • (2024)ReLS: Retrieval Is Efficient Knowledge Transfer For Logic Synthesis2024 ACM/IEEE 6th Symposium on Machine Learning for CAD (MLCAD)10.1109/MLCAD62225.2024.10740254(1-7)Online publication date: 9-Sep-2024
      • (2024)LSTP: A Logic Synthesis Timing Predictor2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)10.1109/ASP-DAC58780.2024.10473925(728-733)Online publication date: 22-Jan-2024
      • (2024)Using a random forest to predict quantized reuse distance in an SSD write bufferComputing10.1007/s00607-024-01343-5106:12(3967-3986)Online publication date: 5-Sep-2024
      • (2024)Logic SynthesisFPGA EDA10.1007/978-981-99-7755-0_9(135-164)Online publication date: 1-Feb-2024
      • (2023)An Efficient Reinforcement Learning Based Framework for Exploring Logic SynthesisACM Transactions on Design Automation of Electronic Systems10.1145/3632174Online publication date: 10-Nov-2023
      • (2023)FlowTune: End-to-End Automatic Logic Optimization Exploration via Domain-Specific Multiarmed BanditIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.321361142:6(1912-1925)Online publication date: Jun-2023
      • (2023)ASAP: Accurate Synthesis Analysis and Prediction with Multi-Task Learning2023 ACM/IEEE 5th Workshop on Machine Learning for CAD (MLCAD)10.1109/MLCAD58807.2023.10299840(1-6)Online publication date: 10-Sep-2023
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