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In-Memory Computing: The Next-Generation AI Computing Paradigm

Published: 07 September 2020 Publication History

Abstract

To overcome the memory bottleneck of von-Neuman architecture, various memory-centric computing techniques are emerging to reduce the latency and energy consumption caused by data communication. The great success of artificial intelligence (AI) algorithms, which involve a large number of computations and data movements, has motivated and accelerated the recent researches of in-memory computing (IMC) techniques to significantly reduce or even diminish the accesses of off-chip data, where memory is not only storing data but can also directly output computation results. For example, the multiply-and-accumulate (MAC) operations in deep learning algorithms can be realized by accessing the memory using the input activations. This paper will investigate the recent trends of IMC from techniques (SRAM, flash, RRAM and other types of non-volatile memory) to architecture and to applications, which will serve as a guide to the future advances on computing in-memory (CIM).

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cover image ACM Other conferences
GLSVLSI '20: Proceedings of the 2020 on Great Lakes Symposium on VLSI
September 2020
597 pages
ISBN:9781450379441
DOI:10.1145/3386263
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

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Publication History

Published: 07 September 2020

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Author Tags

  1. NVM
  2. SRAM
  3. convolutional neural networks (CNNs)
  4. deep learning
  5. in-memory computing (IMC)

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  • Short-paper

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  • National Natural Science Foundation of China

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GLSVLSI '20
GLSVLSI '20: Great Lakes Symposium on VLSI 2020
September 7 - 9, 2020
Virtual Event, China

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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  • (2024)An In-Memory Power Efficient Computing Architecture with Emerging VGSOT MRAM Device2024 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS58744.2024.10557835(1-5)Online publication date: 19-May-2024
  • (2024)A High Linearity Current-Mirror MAC Circuit Design for SRAM Computing-in-Memory2024 9th International Conference on Integrated Circuits and Microsystems (ICICM)10.1109/ICICM63644.2024.10814160(712-716)Online publication date: 25-Oct-2024
  • (2024)In-memory computing: characteristics, spintronics, and neural network applications insightsMultiscale and Multidisciplinary Modeling, Experiments and Design10.1007/s41939-024-00517-07:6(5005-5029)Online publication date: 9-Jul-2024
  • (2023)FAT: An In-Memory Accelerator With Fast Addition for Ternary Weight Neural NetworksIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.318427642:3(781-794)Online publication date: Mar-2023
  • (2023)iMAT: Energy-Efficient In-Memory Acceleration for Ternary Neural Networks With Sparse Dot Product2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)10.1109/ISLPED58423.2023.10244333(1-6)Online publication date: 7-Aug-2023
  • (2023) A 0.0025mm 2 8-bit 70MS/s SAR ADC with a Linearity-Improved Bootstrapped Switch for Computation in Memory 2023 8th International Conference on Integrated Circuits and Microsystems (ICICM)10.1109/ICICM59499.2023.10365851(412-416)Online publication date: 20-Oct-2023
  • (2023)Local bit line 8T SRAM based in-memory computing architecture for energy-efficient linear error correction codec implementationMicroelectronics Journal10.1016/j.mejo.2023.105795137(105795)Online publication date: Jul-2023
  • (2023)An Energy-Efficient Hybrid SRAM-Based In-Memory Computing Macro for Artificial Intelligence Edge DevicesCircuits, Systems, and Signal Processing10.1007/s00034-022-02284-042:6(3589-3616)Online publication date: 14-Jan-2023
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