ABSTRACT
This paper present a new method to automatically synthesize operational amplifiers. The topology synthesis is based on a functional block modeling. Every op-amp consists of hierarchical functional blocks whose behaviors are describable with analytical equations. Synthesizing the topologies based on functional blocks allows to use the sizing of the topologies during the synthesis process to lessen the number of topologies created not fulfilling the specifications. This makes this method different to previous methods and reduces the time needed to find a large variety of topologies fulfilling a given set of specifications. The paper presents the first prototype of the method.
- I. Abel, M. Neuner, and H. Graeb. 2019. Constraint-Programmed Initial Sizing of Analog Operational Amplifiers. In 2019 IEEE 37th International Conference on Computer Design (ICCD). 413--421.Google Scholar
- F. H. Bennett, M. A. Keane, D. Andre, and J. R. Koza. 1999. Automatic Synthesis of the Topology and Sizing for Analog Electrical Circuits using Genetic Programming. In EUROGEN workshop in Jyvdskyld, Finland.Google Scholar
- A. Das and R. Vemuri. 2009. A graph grammar based approach to automated multi-objective analog circuit design. In 2009 Design, Automation Test in Europe Conference Exhibition. 700--705.Google Scholar
- C. Ferent and A. Doboli. 2014. Novel circuit topology synthesis method using circuit feature mining and symbolic comparison. In 2014 Design, Automation Test in Europe Conference Exhibition (DATE). 1--4.Google Scholar
- F. Fernandez, Á. Rodríguez-Vázquez, J. L. Huertas, and G. G. E. Gielen. 1998. Structural Synthesis and Optimization of Analog Circuits. 211--232.Google Scholar
- D. Guilherme, J. Guilherme, and N. Horta. 2010. Automatic topology selection and sizing of Class-D loop-filters for minimizing distortion. In 2010 XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD). 1--4.Google Scholar
- Kenneth R. Laker and Willy M. C. Sansen. 1994. Design of analog integrated circuits and systems. McGraw-Hill.Google Scholar
- P. C. Maulik, L. R. Carley, and R. A. Rutenbar. 1995. Integer programming based topology selection of cell-level analog circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 14, 4 (April 1995), 401--412.Google ScholarDigital Library
- T. McConaghy, P. Palmers, M. Steyaert, and G. G. E. Gielen. 2009. Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 28, 9 (2009), 1281--1294.Google ScholarDigital Library
- M. Meissner and L. Hedrich. 2015. FEATS: Framework for Explorative Analog Topology Synthesis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2015).Google Scholar
- Z. Zhao and L. Zhang. 2019. A Graph Grammar Based Approach to Automated Multi-Objective Analog Circuit Design. In 2019 IEEE International Symposium on Circuits and Systems (ISCAS). 1--5.Google Scholar
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